[Intel-gfx] [PATCH 4/8] drm/i915: Split PPGTT enabling from Aliasing PPGTT switching

oscar.mateo at intel.com oscar.mateo at intel.com
Wed Jun 18 18:15:38 CEST 2014


From: Oscar Mateo <oscar.mateo at intel.com>

At this point, I could simply kill the sync_switch_mm function pointer
off and just transform it into some static functions belonging to
i915_gem_gtt.c

But I have a problem with Execlists: enabling the PPGTT is still needed,
but switching to it the old way (writing to the PDP registers) is not.
So, instead, use this as a preparatory patch to give me the option to do
one without the other.

Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c     | 28 ----------------------------
 drivers/gpu/drm/i915/intel_ringbuffer.c |  8 ++++++++
 2 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 63507eb..707cbb8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -934,23 +934,10 @@ static int gen8_ppgtt_enable(struct i915_hw_ppgtt *ppgtt,
 {
 	struct drm_device *dev = ppgtt->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	int ret;
 
 	I915_WRITE(RING_MODE_GEN7(ring),
 		   _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
 
-	/* We promise to do a switch later with FULL PPGTT. If this is
-	 * aliasing, this is the one and only switch we'll do */
-	if (USES_FULL_PPGTT(dev))
-		return 0;
-
-	ret = ppgtt->sync_switch_mm(ppgtt, ring);
-	if (ret) {
-		I915_WRITE(RING_MODE_GEN7(ring),
-			   _MASKED_BIT_DISABLE(GFX_PPGTT_ENABLE));
-		return ret;
-	}
-
 	return 0;
 }
 
@@ -960,7 +947,6 @@ static int gen7_ppgtt_enable(struct i915_hw_ppgtt *ppgtt,
 	struct drm_device *dev = ppgtt->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t ecochk, ecobits;
-	int ret;
 
 	ecobits = I915_READ(GAC_ECO_BITS);
 	I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B);
@@ -978,15 +964,6 @@ static int gen7_ppgtt_enable(struct i915_hw_ppgtt *ppgtt,
 	I915_WRITE(RING_MODE_GEN7(ring),
 		   _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
 
-	/* We promise to do a switch later with FULL PPGTT. If this is
-	 * aliasing, this is the one and only switch we'll do */
-	if (USES_FULL_PPGTT(dev))
-		return 0;
-
-	ret = ppgtt->sync_switch_mm(ppgtt, ring);
-	if (ret)
-		return ret;
-
 	return 0;
 }
 
@@ -996,7 +973,6 @@ static int gen6_ppgtt_enable(struct i915_hw_ppgtt *ppgtt,
 	struct drm_device *dev = ppgtt->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t ecochk, gab_ctl, ecobits;
-	int ret;
 
 	ecobits = I915_READ(GAC_ECO_BITS);
 	I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_SNB_BIT |
@@ -1010,10 +986,6 @@ static int gen6_ppgtt_enable(struct i915_hw_ppgtt *ppgtt,
 
 	I915_WRITE(GFX_MODE, _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
 
-	ret = ppgtt->sync_switch_mm(ppgtt, ring);
-	if (ret)
-		return ret;
-
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e53e32e..8050c70 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1481,6 +1481,14 @@ static int intel_init_ring_buffer(struct drm_device *dev,
 	if (dev_priv->mm.aliasing_ppgtt) {
 		struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
 		ppgtt->enable(ppgtt, ring);
+
+		/* We promise to do a switch later with FULL PPGTT. If this is
+		 * aliasing, this is the one and only switch we'll do */
+		if (!USES_FULL_PPGTT(dev)) {
+			ret = ppgtt->sync_switch_mm(ppgtt, ring);
+			if (ret)
+				goto error;
+		}
 	}
 
 	return 0;
-- 
1.9.0




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