[Intel-gfx] [RFC] drm/i915: Add variable gem object size support to i915

[Damien Lespiau]

On Wed, Jun 25, 2014 at 11:51:33AM +0100, Damien Lespiau wrote:
> (This is not necessarily things one would need to take into account for
> this work, just a few thoughts).
> 
> One thing I'm wondering is how fitting the "size" parameter really is
> when talking about inherently 2D buffers.
> 
> For instance, let's take a Y-tiled texture with MIPLAYOUT_RIGHT, if we
> want to allocate mip map levels 0 and 1, and use the ioctl "naively" to
> reserve the LOD1 region in one go, we'll end up over allocating the
> space below LOD1 (if I'm not mistaken that is).
> 
> This can be mitigated by several calls to this fallocate ioctl, to
> reserve columns of pages (in the case above, columns for the LOD1
> region).
> 
> So, how about trying to reduce this ioctl overhead by providing a list
> of (start, length) in the ioctl structure?

One more thing to factor in is (let's assume one future hardware will
support that):
https://www.opengl.org/registry/specs/ARB/sparse_texture.txt

So maybe what we really want is to be able to specify region of pages
that could be specified in (x, y, width, height, stride) ? (idea popped
when talking to Neil Roberts (I now have someone working on Mesa in the
office).

-- 
Damien