[Intel-gfx] [PATCH 02/11] drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bits

Jesse Barnes jbarnes at virtuousgeek.org
Wed Jun 25 20:45:06 CEST 2014


On Fri, 13 Jun 2014 13:37:48 +0300
ville.syrjala at linux.intel.com wrote:

> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Avoid using magic values for CCK frequency bits. Also the mask we were
> using for the requested frequency was one bit too short. Fix it up.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h      | 5 +++++
>  drivers/gpu/drm/i915/intel_display.c | 4 ++--
>  2 files changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0f4a0ed..2aa9a3c 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -584,6 +584,11 @@ enum punit_power_well {
>  #define  DSI_PLL_M1_DIV_SHIFT			0
>  #define  DSI_PLL_M1_DIV_MASK			(0x1ff << 0)
>  #define CCK_DISPLAY_CLOCK_CONTROL		0x6b
> +#define  DISPLAY_TRUNK_FORCE_ON			(1 << 17)
> +#define  DISPLAY_TRUNK_FORCE_OFF		(1 << 16)
> +#define  DISPLAY_FREQUENCY_STATUS		(0x1f << 8)
> +#define  DISPLAY_FREQUENCY_STATUS_SHIFT		8
> +#define  DISPLAY_FREQUENCY_VALUES		(0x1f << 0)
>  
>  /**
>   * DOC: DPIO
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5f66dc8..36562b5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4480,7 +4480,7 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
>  		mutex_lock(&dev_priv->dpio_lock);
>  		/* adjust cdclk divider */
>  		val = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
> -		val &= ~0xf;
> +		val &= ~DISPLAY_FREQUENCY_VALUES;
>  		val |= divider;
>  		vlv_cck_write(dev_priv, CCK_DISPLAY_CLOCK_CONTROL, val);
>  		mutex_unlock(&dev_priv->dpio_lock);
> @@ -4517,7 +4517,7 @@ int valleyview_cur_cdclk(struct drm_i915_private *dev_priv)
>  	divider = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
>  	mutex_unlock(&dev_priv->dpio_lock);
>  
> -	divider &= 0xf;
> +	divider &= DISPLAY_FREQUENCY_VALUES;
>  
>  	cur_cdclk = DIV_ROUND_CLOSEST(vco << 1, divider + 1);
>  

You snuck in a fix for the mask here, but it looks correct.

Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org

-- 
Jesse Barnes, Intel Open Source Technology Center



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