[Intel-gfx] [PATCH 05/11] drm/i915: Use 200MHz cdclk on vlv when all pipes are off

Ville Syrjälä ville.syrjala at linux.intel.com
Wed Jun 25 21:32:17 CEST 2014


On Wed, Jun 25, 2014 at 11:54:06AM -0700, Jesse Barnes wrote:
> On Fri, 13 Jun 2014 13:37:51 +0300
> ville.syrjala at linux.intel.com wrote:
> 
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Drop the cdclk frequency to 200MHz on vlv when all pipes are off. In
> > theory we should be able to use 200MHz also when the pixel clock is at
> > most 90% of 200MHz. However in practice all we seem to get is a solid
> > color picture or an otherwise corrupted display.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 9 +++++++--
> >  1 file changed, 7 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 1f3985f..3a9b017 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -4520,14 +4520,19 @@ static int valleyview_calc_cdclk(struct drm_i915_private *dev_priv,
> >  	 *   400MHz
> >  	 * So we check to see whether we're above 90% of the lower bin and
> >  	 * adjust if needed.
> > +	 *
> > +	 * We seem to get an unstable or solid color picture at 200MHz.
> > +	 * Not sure what's wrong. For now use 200MHz only when all pipes
> > +	 * are off.
> >  	 */
> >  	if (max_pixclk > freq_320*9/10)
> >  		return 400000;
> >  	else if (max_pixclk > 266667*9/10)
> >  		return freq_320;
> > -	else
> > +	else if (max_pixclk > 0)
> >  		return 266667;
> > -	/* Looks like the 200MHz CDclk freq doesn't work on some configs */
> > +	else
> > +		return 200000;
> >  }
> >  
> >  /* compute the max pixel clock for new configuration */
> 
> I guess this is safe, but optional (won't we be shutting off the clocks
> anyway?).

Ideally yes. But currently I'm not sure if that happens.

> 
> Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> 
> -- 
> Jesse Barnes, Intel Open Source Technology Center

-- 
Ville Syrjälä
Intel OTC



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