[Intel-gfx] [PATCH] drm/i915: Fix some NUM_RING iterators
Chris Wilson
chris at chris-wilson.co.uk
Sat Jun 28 21:28:55 CEST 2014
On Sat, Jun 28, 2014 at 08:26:15AM -0700, Ben Widawsky wrote:
> On Sat, Jun 28, 2014 at 07:20:38AM +0100, Chris Wilson wrote:
> > > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
> > > b/drivers/gpu/drm/i915/i915_gpu_error.c
> > > index 86362de..6e5250d 100644
> > > --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> > > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> > > @@ -848,7 +848,7 @@ static uint32_t i915_error_generate_code(struct
> > > drm_i915_private *dev_priv,
> > > * synchronization commands which almost always appear in the
> > > case
> > > * strictly a client bug. Use instdone to differentiate those
> > > some.
> > > */
> > > - for (i = 0; i < I915_NUM_RINGS; i++) {
> > > + for (i = 0; i < I915_ACTIVE_RINGS(dev_priv->dev); i++) {
> > > if (error->ring[i].hangcheck_action == HANGCHECK_HUNG) {
> > > if (ring_id)
> > > *ring_id = i;
> > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
> > > b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > > index e72017b..67e2919 100644
> > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > > @@ -90,6 +90,8 @@ struct intel_engine_cs {
> > > } id;
> > > #define I915_NUM_RINGS 5
> > > #define LAST_USER_RING (VECS + 1)
> > > +#define I915_ACTIVE_RINGS(dev) hweight8(INTEL_INFO(dev)->ring_mask)
> >
> > What does the popcount of the mask have to do with the validity of the
> > arrays being iterated over in this patch?
> > -Chris
>
> The popcount of the mask represents the number of rings available on the
> specific SKU, as opposed to the total number of rings on any SKU ever.
> It is not always correct to iterate on all rings in the system. Please
> note, the patch is incomplete. I have a couple of other, perhaps more
> interesting, cases which I've missed.
You still iterate over holes in the ring mask, and the iteration here is
over a completely different array, not rings.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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