[Intel-gfx] [PATCH 1/7] intel_audio_dump: support using base address plus an offset to dump registers

[mengdong.lin at intel.com]

From: Mengdong Lin <mengdong.lin at intel.com>

Layout of display and audio registers can be same for different Intel GPUs.
For code sharing, this patches defines functions to
- set the base address of display and audio registers
- dump registers using the base address and an offset

Signed-off-by: Mengdong Lin <mengdong.lin at intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang at intel.com>

diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 43a5bce..47926e4 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -37,6 +37,8 @@
 
 static uint32_t devid;
 
+static int aud_reg_base = 0;	/* base address of audio registers */
+static int disp_reg_base = 0;	/* base address of display registers */
 
 #define BITSTO(n)		(n >= sizeof(long) * 8 ? ~0 : (1UL << (n)) - 1)
 #define BITMASK(high, low)	(BITSTO(high+1) & ~BITSTO(low))
@@ -51,12 +53,33 @@ static uint32_t devid;
 #define OPNAME(names, index)   \
 	names[min_t(unsigned int, index, ARRAY_SIZE(names) - 1)]
 
+#define set_aud_reg_base(base)    (aud_reg_base = (base))
+
+#define set_reg_base(base, audio_offset)	\
+	do {					\
+		disp_reg_base = (base);		\
+		set_aud_reg_base((base) + (audio_offset));	\
+	} while (0)
+
 #define dump_reg(reg, desc)					\
 	do {							\
 		dword = INREG(reg);	\
 		printf("%-21s 0x%08x  %s\n", # reg, dword, desc);	\
 	} while (0)
 
+#define dump_disp_reg(reg, desc)					\
+	do {							\
+		dword = INREG(disp_reg_base + reg);	\
+		printf("%-21s 0x%08x  %s\n", # reg, dword, desc);	\
+	} while (0)
+
+#define dump_aud_reg(reg, desc)					\
+	do {							\
+		dword = INREG(aud_reg_base + reg);	\
+		printf("%-21s 0x%08x  %s\n", # reg, dword, desc);	\
+	} while (0)
+
+#define read_aud_reg(reg)	INREG(aud_reg_base + (reg))
 
 static const char * const pixel_clock[] = {
 	[0] = "25.2 / 1.001 MHz",
-- 
1.8.1.2