[Intel-gfx] [PATCH 5/7] intel_audio_dump: share common audio dump code for Ironlake, Haswell & Broadwell
mengdong.lin at intel.com
mengdong.lin at intel.com
Tue Mar 4 17:29:13 CET 2014
From: Mengdong Lin <mengdong.lin at intel.com>
Most audio config registers of Ironlake, Haswell and Broadwell are almost same
although the register names or some bit fields have little difference.
And HSW and BDW already share their code.
This patch further shares code for ILK and HSW/BDW:
- ILK and HSW/BDW define their own base address to dump audio & display registers.
- Small functions to dump a specific register are defined and shared.
Signed-off-by: Mengdong Lin <mengdong.lin at intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang at intel.com>
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 8632ad3..e6f6002 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -729,362 +729,6 @@ static void dump_eaglelake(void)
#undef AUD_HDMIW_STATUS
/*
- * IronLake registers
- */
-#define AUD_CONFIG_A 0xE2000
-#define AUD_CONFIG_B 0xE2100
-#define AUD_CTS_ENABLE_A 0xE2028
-#define AUD_CTS_ENABLE_B 0xE2128
-#define AUD_MISC_CTRL_A 0xE2010
-#define AUD_MISC_CTRL_B 0xE2110
-#define AUD_VID_DID 0xE2020
-#define AUD_RID 0xE2024
-#define AUD_PWRST 0xE204C
-#define AUD_PORT_EN_HD_CFG 0xE207C
-#define AUD_OUT_DIG_CNVT_A 0xE2080
-#define AUD_OUT_DIG_CNVT_B 0xE2180
-#define AUD_OUT_CH_STR 0xE2088
-#define AUD_OUT_STR_DESC_A 0xE2084
-#define AUD_OUT_STR_DESC_B 0xE2184
-#define AUD_PINW_CONNLNG_LIST 0xE20A8
-#define AUD_PINW_CONNLNG_SEL 0xE20AC
-#define AUD_CNTL_ST_A 0xE20B4
-#define AUD_CNTL_ST_B 0xE21B4
-#define AUD_CNTL_ST2 0xE20C0
-#define AUD_HDMIW_STATUS 0xE20D4
-#define AUD_HDMIW_HDMIEDID_A 0xE2050
-#define AUD_HDMIW_HDMIEDID_B 0xE2150
-#define AUD_HDMIW_INFOFR_A 0xE2054
-#define AUD_HDMIW_INFOFR_B 0xE2154
-
-static void dump_ironlake(void)
-{
- uint32_t dword;
- int i;
-
- dump_reg(HDMIB, "sDVO/HDMI Port B Control");
- dump_reg(HDMIC, "HDMI Port C Control");
- dump_reg(HDMID, "HDMI Port D Control");
- dump_reg(PCH_DP_B, "DisplayPort B Control Register");
- dump_reg(PCH_DP_C, "DisplayPort C Control Register");
- dump_reg(PCH_DP_D, "DisplayPort D Control Register");
- dump_reg(AUD_CONFIG_A, "Audio Configuration - Transcoder A");
- dump_reg(AUD_CONFIG_B, "Audio Configuration - Transcoder B");
- dump_reg(AUD_CTS_ENABLE_A, "Audio CTS Programming Enable - Transcoder A");
- dump_reg(AUD_CTS_ENABLE_B, "Audio CTS Programming Enable - Transcoder B");
- dump_reg(AUD_MISC_CTRL_A, "Audio MISC Control for Transcoder A");
- dump_reg(AUD_MISC_CTRL_B, "Audio MISC Control for Transcoder B");
- dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID");
- dump_reg(AUD_RID, "Audio Revision ID");
- dump_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)");
- dump_reg(AUD_PORT_EN_HD_CFG, "Audio Port Enable HDAudio Config");
- dump_reg(AUD_OUT_DIG_CNVT_A, "Audio Digital Converter - Conv A");
- dump_reg(AUD_OUT_DIG_CNVT_B, "Audio Digital Converter - Conv B");
- dump_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID");
- dump_reg(AUD_OUT_STR_DESC_A, "Audio Stream Descriptor Format - Conv A");
- dump_reg(AUD_OUT_STR_DESC_B, "Audio Stream Descriptor Format - Conv B");
- dump_reg(AUD_PINW_CONNLNG_LIST, "Audio Connection List");
- dump_reg(AUD_PINW_CONNLNG_SEL, "Audio Connection Select");
- dump_reg(AUD_CNTL_ST_A, "Audio Control State Register - Transcoder A");
- dump_reg(AUD_CNTL_ST_B, "Audio Control State Register - Transcoder B");
- dump_reg(AUD_CNTL_ST2, "Audio Control State 2");
- dump_reg(AUD_HDMIW_STATUS, "Audio HDMI Status");
- dump_reg(AUD_HDMIW_HDMIEDID_A, "HDMI Data EDID Block - Transcoder A");
- dump_reg(AUD_HDMIW_HDMIEDID_B, "HDMI Data EDID Block - Transcoder B");
- dump_reg(AUD_HDMIW_INFOFR_A, "Audio Widget Data Island Packet - Transcoder A");
- dump_reg(AUD_HDMIW_INFOFR_B, "Audio Widget Data Island Packet - Transcoder B");
-
- printf("\nDetails:\n\n");
-
- dword = INREG(AUD_VID_DID);
- printf("AUD_VID_DID vendor id\t\t\t\t\t0x%x\n", dword >> 16);
- printf("AUD_VID_DID device id\t\t\t\t\t0x%x\n", dword & 0xffff);
-
- dword = INREG(AUD_RID);
- printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20));
- printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
- printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8));
- printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0));
-
- dword = INREG(HDMIB);
- printf("HDMIB HDMIB_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
- printf("HDMIB Transcoder_Select\t\t\t\t\t%s\n", BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
- printf("HDMIB HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5));
- printf("HDMIB SDVOB Hot Plug Interrupt Detect Enable\t\t%lu\n", BIT(dword, 23));
- printf("HDMIB Digital_Port_B_Detected\t\t\t\t%lu\n", BIT(dword, 2));
- printf("HDMIB Encoding\t\t\t\t\t\t[0x%lx] %s\n",
- BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]);
- printf("HDMIB Null_packets_enabled_during_Vsync\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
- printf("HDMIB Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
-
- dword = INREG(HDMIC);
- printf("HDMIC HDMIC_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
- printf("HDMIC Transcoder_Select\t\t\t\t\t%s\n", BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
- printf("HDMIC HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5));
- printf("HDMIC Digital_Port_C_Detected\t\t\t\t%lu\n", BIT(dword, 2));
- printf("HDMIC Encoding\t\t\t\t\t\t[0x%lx] %s\n",
- BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]);
- printf("HDMIC Null_packets_enabled_during_Vsync\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
- printf("HDMIC Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
-
- dword = INREG(HDMID);
- printf("HDMID HDMID_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
- printf("HDMID Transcoder_Select\t\t\t\t\t%s\n", BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
- printf("HDMID HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5));
- printf("HDMID Digital_Port_D_Detected\t\t\t\t%lu\n", BIT(dword, 2));
- printf("HDMID Encoding\t\t\t\t\t\t[0x%lx] %s\n",
- BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]);
- printf("HDMID Null_packets_enabled_during_Vsync\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
- printf("HDMID Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
-
- dword = INREG(PCH_DP_B);
- printf("PCH_DP_B DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
- printf("PCH_DP_B Transcoder_Select\t\t\t\t%s\n", BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
- printf("PCH_DP_B Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
- BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
- printf("PCH_DP_B Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2));
- printf("PCH_DP_B HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
- printf("PCH_DP_B Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
-
- dword = INREG(PCH_DP_C);
- printf("PCH_DP_C DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
- printf("PCH_DP_C Transcoder_Select\t\t\t\t%s\n", BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
- printf("PCH_DP_C Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
- BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
- printf("PCH_DP_C Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2));
- printf("PCH_DP_C HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
- printf("PCH_DP_C Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
-
- dword = INREG(PCH_DP_D);
- printf("PCH_DP_D DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31));
- printf("PCH_DP_D Transcoder_Select\t\t\t\t%s\n", BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
- printf("PCH_DP_D Port_Width_Selection\t\t\t\t[0x%lx] %s\n",
- BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]);
- printf("PCH_DP_D Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2));
- printf("PCH_DP_D HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5));
- printf("PCH_DP_D Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6));
-
- dword = INREG(AUD_CONFIG_A);
- printf("AUD_CONFIG_A N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
- n_index_value[BIT(dword, 29)]);
- printf("AUD_CONFIG_A N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
- printf("AUD_CONFIG_A Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20));
- printf("AUD_CONFIG_A Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4));
- printf("AUD_CONFIG_A Pixel_Clock\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
- OPNAME(pixel_clock, BITS(dword, 19, 16)));
- printf("AUD_CONFIG_A Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
- dword = INREG(AUD_CONFIG_B);
- printf("AUD_CONFIG_B N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29),
- n_index_value[BIT(dword, 29)]);
- printf("AUD_CONFIG_B N_programming_enable\t\t\t%lu\n", BIT(dword, 28));
- printf("AUD_CONFIG_B Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20));
- printf("AUD_CONFIG_B Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4));
- printf("AUD_CONFIG_B Pixel_Clock\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
- OPNAME(pixel_clock, BITS(dword, 19, 16)));
- printf("AUD_CONFIG_B Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3));
-
- dword = INREG(AUD_CTS_ENABLE_A);
- printf("AUD_CTS_ENABLE_A Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
- printf("AUD_CTS_ENABLE_A CTS/M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
- printf("AUD_CTS_ENABLE_A CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
- dword = INREG(AUD_CTS_ENABLE_B);
- printf("AUD_CTS_ENABLE_B Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20));
- printf("AUD_CTS_ENABLE_B CTS/M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M");
- printf("AUD_CTS_ENABLE_B CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0));
-
- dword = INREG(AUD_MISC_CTRL_A);
- printf("AUD_MISC_CTRL_A Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
- printf("AUD_MISC_CTRL_A Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
- printf("AUD_MISC_CTRL_A Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
- printf("AUD_MISC_CTRL_A Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
- dword = INREG(AUD_MISC_CTRL_B);
- printf("AUD_MISC_CTRL_B Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2));
- printf("AUD_MISC_CTRL_B Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8));
- printf("AUD_MISC_CTRL_B Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4));
- printf("AUD_MISC_CTRL_B Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1));
-
- dword = INREG(AUD_PWRST);
- printf("AUD_PWRST Function_Group_Device_Power_State_Current\t%s\n", power_state[BITS(dword, 23, 22)]);
- printf("AUD_PWRST Function_Group_Device_Power_State_Set \t%s\n", power_state[BITS(dword, 21, 20)]);
- printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]);
- printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]);
- printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]);
- printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]);
- printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]);
- printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]);
- printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 7, 6)]);
- printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]);
- printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]);
- printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]);
-
- dword = INREG(AUD_PORT_EN_HD_CFG);
- printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0));
- printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1));
- printf("AUD_PORT_EN_HD_CFG ConvertorA_Stream_ID\t\t%lu\n", BITS(dword, 7, 4));
- printf("AUD_PORT_EN_HD_CFG ConvertorB_Stream_ID\t\t%lu\n", BITS(dword, 11, 8));
- printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 12));
- printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 13));
- printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 14));
- printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 16));
- printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 17));
- printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 18));
-
- dword = INREG(AUD_OUT_DIG_CNVT_A);
- printf("AUD_OUT_DIG_CNVT_A V\t\t\t\t\t%lu\n", BIT(dword, 1));
- printf("AUD_OUT_DIG_CNVT_A VCFG\t\t\t\t%lu\n", BIT(dword, 2));
- printf("AUD_OUT_DIG_CNVT_A PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
- printf("AUD_OUT_DIG_CNVT_A Copy\t\t\t\t%lu\n", BIT(dword, 4));
- printf("AUD_OUT_DIG_CNVT_A NonAudio\t\t\t\t%lu\n", BIT(dword, 5));
- printf("AUD_OUT_DIG_CNVT_A PRO\t\t\t\t\t%lu\n", BIT(dword, 6));
- printf("AUD_OUT_DIG_CNVT_A Level\t\t\t\t%lu\n", BIT(dword, 7));
- printf("AUD_OUT_DIG_CNVT_A Category_Code\t\t\t%lu\n", BITS(dword, 14, 8));
- printf("AUD_OUT_DIG_CNVT_A Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
- printf("AUD_OUT_DIG_CNVT_A Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20));
-
- dword = INREG(AUD_OUT_DIG_CNVT_B);
- printf("AUD_OUT_DIG_CNVT_B V\t\t\t\t\t%lu\n", BIT(dword, 1));
- printf("AUD_OUT_DIG_CNVT_B VCFG\t\t\t\t%lu\n", BIT(dword, 2));
- printf("AUD_OUT_DIG_CNVT_B PRE\t\t\t\t\t%lu\n", BIT(dword, 3));
- printf("AUD_OUT_DIG_CNVT_B Copy\t\t\t\t%lu\n", BIT(dword, 4));
- printf("AUD_OUT_DIG_CNVT_B NonAudio\t\t\t\t%lu\n", BIT(dword, 5));
- printf("AUD_OUT_DIG_CNVT_B PRO\t\t\t\t\t%lu\n", BIT(dword, 6));
- printf("AUD_OUT_DIG_CNVT_B Level\t\t\t\t%lu\n", BIT(dword, 7));
- printf("AUD_OUT_DIG_CNVT_B Category_Code\t\t\t%lu\n", BITS(dword, 14, 8));
- printf("AUD_OUT_DIG_CNVT_B Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16));
- printf("AUD_OUT_DIG_CNVT_B Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20));
-
- printf("AUD_OUT_CH_STR Converter_Channel_MAP PORTB PORTC PORTD\n");
- for (i = 0; i < 8; i++) {
- OUTREG(AUD_OUT_CH_STR, i | (i << 8) | (i << 16));
- dword = INREG(AUD_OUT_CH_STR);
- printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
- 1 + BITS(dword, 3, 0),
- 1 + BITS(dword, 7, 4),
- 1 + BITS(dword, 15, 12),
- 1 + BITS(dword, 23, 20));
- }
-
- dword = INREG(AUD_OUT_STR_DESC_A);
- printf("AUD_OUT_STR_DESC_A HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
- printf("AUD_OUT_STR_DESC_A Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
- printf("AUD_OUT_STR_DESC_A Bits_per_Sample\t\t\t[%#lx] %s\n",
- BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
- printf("AUD_OUT_STR_DESC_A Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
-
- dword = INREG(AUD_OUT_STR_DESC_B);
- printf("AUD_OUT_STR_DESC_B HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27));
- printf("AUD_OUT_STR_DESC_B Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1);
- printf("AUD_OUT_STR_DESC_B Bits_per_Sample\t\t\t[%#lx] %s\n",
- BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4)));
- printf("AUD_OUT_STR_DESC_B Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0));
-
- dword = INREG(AUD_PINW_CONNLNG_SEL);
- printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_B\t%lu\n", BITS(dword, 7, 0));
- printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_C\t%lu\n", BITS(dword, 15, 8));
- printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_D\t%lu\n", BITS(dword, 23, 16));
-
- dword = INREG(AUD_CNTL_ST_A);
- printf("AUD_CNTL_ST_A DIP_Port_Select\t\t\t\t[%#lx] %s\n",
- BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
- printf("AUD_CNTL_ST_A DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
- printf("AUD_CNTL_ST_A DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22));
- printf("AUD_CNTL_ST_A DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23));
- printf("AUD_CNTL_ST_A DIP_transmission_frequency\t\t[0x%lx] %s\n",
- BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]);
- printf("AUD_CNTL_ST_A ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
- printf("AUD_CNTL_ST_A ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
- printf("AUD_CNTL_ST_A ELD_access_address\t\t\t%lu\n", BITS(dword, 9, 5));
-
- dword = INREG(AUD_CNTL_ST_B);
- printf("AUD_CNTL_ST_B DIP_Port_Select\t\t\t\t[%#lx] %s\n",
- BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
- printf("AUD_CNTL_ST_B DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21));
- printf("AUD_CNTL_ST_B DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22));
- printf("AUD_CNTL_ST_B DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23));
- printf("AUD_CNTL_ST_B DIP_transmission_frequency\t\t[0x%lx] %s\n",
- BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]);
- printf("AUD_CNTL_ST_B ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4));
- printf("AUD_CNTL_ST_B ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10));
- printf("AUD_CNTL_ST_B ELD_access_address\t\t\t%lu\n", BITS(dword, 9, 5));
-
- dword = INREG(AUD_CNTL_ST2);
- printf("AUD_CNTL_ST2 CP_ReadyB\t\t\t\t\t%lu\n", BIT(dword, 1));
- printf("AUD_CNTL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0));
- printf("AUD_CNTL_ST2 CP_ReadyC\t\t\t\t\t%lu\n", BIT(dword, 5));
- printf("AUD_CNTL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4));
- printf("AUD_CNTL_ST2 CP_ReadyD\t\t\t\t\t%lu\n", BIT(dword, 9));
- printf("AUD_CNTL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8));
-
- dword = INREG(AUD_HDMIW_STATUS);
- printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31));
- printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30));
- printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29));
- printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28));
- printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25));
- printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 29));
-
- printf("AUD_HDMIW_HDMIEDID_A HDMI ELD:\n\t");
- dword = INREG(AUD_CNTL_ST_A);
- dword &= ~BITMASK(9, 5);
- OUTREG(AUD_CNTL_ST_A, dword);
- for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_A)));
- printf("\n");
-
- printf("AUD_HDMIW_HDMIEDID_B HDMI ELD:\n\t");
- dword = INREG(AUD_CNTL_ST_B);
- dword &= ~BITMASK(9, 5);
- OUTREG(AUD_CNTL_ST_B, dword);
- for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_B)));
- printf("\n");
-
- printf("AUD_HDMIW_INFOFR_A HDMI audio Infoframe:\n\t");
- dword = INREG(AUD_CNTL_ST_A);
- dword &= ~BITMASK(20, 18);
- dword &= ~BITMASK(3, 0);
- OUTREG(AUD_CNTL_ST_A, dword);
- for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_A)));
- printf("\n");
-
- printf("AUD_HDMIW_INFOFR_B HDMI audio Infoframe:\n\t");
- dword = INREG(AUD_CNTL_ST_B);
- dword &= ~BITMASK(20, 18);
- dword &= ~BITMASK(3, 0);
- OUTREG(AUD_CNTL_ST_B, dword);
- for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_B)));
- printf("\n");
-
-}
-
-
-#undef AUD_CONFIG_A
-#undef AUD_MISC_CTRL_A
-#undef AUD_VID_DID
-#undef AUD_RID
-#undef AUD_CTS_ENABLE_A
-#undef AUD_PWRST
-#undef AUD_HDMIW_HDMIEDID_A
-#undef AUD_HDMIW_INFOFR_A
-#undef AUD_PORT_EN_HD_CFG
-#undef AUD_OUT_DIG_CNVT_A
-#undef AUD_OUT_STR_DESC_A
-#undef AUD_OUT_CH_STR
-#undef AUD_PINW_CONNLNG_LIST
-#undef AUD_CNTL_ST_A
-#undef AUD_HDMIW_STATUS
-#undef AUD_CONFIG_B
-#undef AUD_MISC_CTRL_B
-#undef AUD_CTS_ENABLE_B
-#undef AUD_HDMIW_HDMIEDID_B
-#undef AUD_HDMIW_INFOFR_B
-#undef AUD_OUT_DIG_CNVT_B
-#undef AUD_OUT_STR_DESC_B
-#undef AUD_CNTL_ST_B
-
-/*
* CougarPoint registers
*/
#define DP_CTL_B 0xE4100
@@ -1110,7 +754,7 @@ static void dump_ironlake(void)
#define AUD_OUT_STR_DESC_A 0xE5084
#define AUD_OUT_CH_STR 0xE5088
#define AUD_PINW_CONNLNG_LIST 0xE50A8
-#define AUD_PINW_CONNLNG_SELA 0xE50AC
+#define AUD_PINW_CONNLNG_SEL 0xE50AC
#define AUD_CNTL_ST_A 0xE50B4
#define AUD_CNTRL_ST2 0xE50C0
#define AUD_CNTRL_ST3 0xE50C4
@@ -1587,193 +1231,118 @@ static void dump_cpt(void)
}
+/* Audio config registers of Ironlake */
#undef AUD_CONFIG_A
+#undef AUD_CONFIG_B
#undef AUD_MISC_CTRL_A
+#undef AUD_MISC_CTRL_B
#undef AUD_VID_DID
#undef AUD_RID
#undef AUD_CTS_ENABLE_A
+#undef AUD_CTS_ENABLE_B
#undef AUD_PWRST
#undef AUD_HDMIW_HDMIEDID_A
+#undef AUD_HDMIW_HDMIEDID_B
#undef AUD_HDMIW_INFOFR_A
+#undef AUD_HDMIW_INFOFR_B
#undef AUD_PORT_EN_HD_CFG
#undef AUD_OUT_DIG_CNVT_A
+#undef AUD_OUT_DIG_CNVT_B
#undef AUD_OUT_STR_DESC_A
+#undef AUD_OUT_STR_DESC_B
#undef AUD_OUT_CH_STR
#undef AUD_PINW_CONNLNG_LIST
#undef AUD_PINW_CONNLNG_SEL
#undef AUD_CNTL_ST_A
-#undef AUD_HDMIW_STATUS
-#undef AUD_CONFIG_B
-#undef AUD_MISC_CTRL_B
-#undef AUD_CTS_ENABLE_B
-#undef AUD_HDMIW_HDMIEDID_B
-#undef AUD_HDMIW_INFOFR_B
-#undef AUD_OUT_DIG_CNVT_B
-#undef AUD_OUT_STR_DESC_B
#undef AUD_CNTL_ST_B
-#undef AUD_CONFIG_C
-#undef AUD_MISC_CTRL_C
-#undef AUD_CTS_ENABLE_C
-#undef AUD_HDMIW_HDMIEDID_C
-#undef AUD_HDMIW_INFOFR_C
-#undef AUD_OUT_DIG_CNVT_C
-#undef AUD_OUT_STR_DESC_C
-
-#undef VIDEO_DIP_CTL_A
-#undef VIDEO_DIP_CTL_B
-#undef VIDEO_DIP_CTL_C
-#undef VIDEO_DIP_CTL_D
-#undef VIDEO_DIP_DATA
-
-/*
- * Haswell registers
- */
-
-/* DisplayPort Transport Control */
-#define DP_TP_CTL_A 0x64040
-#define DP_TP_CTL_B 0x64140
-#define DP_TP_CTL_C 0x64240
-#define DP_TP_CTL_D 0x64340
-#define DP_TP_CTL_E 0x64440
-
-/* DisplayPort Transport Status */
-#define DP_TP_ST_A 0x64044
-#define DP_TP_ST_B 0x64144
-#define DP_TP_ST_C 0x64244
-#define DP_TP_ST_D 0x64344
-#define DP_TP_ST_E 0x64444
-
-/* DDI Buffer Control */
-#define DDI_BUF_CTL_A 0x64000
-#define DDI_BUF_CTL_B 0x64100
-#define DDI_BUF_CTL_C 0x64200
-#define DDI_BUF_CTL_D 0x64300
-#define DDI_BUF_CTL_E 0x64400
-
-/* DDI Buffer Translation */
-#define DDI_BUF_TRANS_A 0x64e00
-#define DDI_BUF_TRANS_B 0x64e60
-#define DDI_BUF_TRANS_C 0x64ec0
-#define DDI_BUF_TRANS_D 0x64f20
-#define DDI_BUF_TRANS_E 0x64f80
-
-/* DDI Aux Channel */
-#define DDI_AUX_CHANNEL_CTRL 0x64010
-#define DDI_AUX_DATA 0x64014
-#define DDI_AUX_TST 0x64028
-
-/* DDI CRC Control */
-#define DDI_CRC_CTL_A 0x64050
-#define DDI_CRC_CTL_B 0x64150
-#define DDI_CRC_CTL_C 0x64250
-#define DDI_CRC_CTL_D 0x64350
-#define DDI_CRC_CTL_E 0x64450
-
-/* Pipe DDI Function Control */
-#define PIPE_DDI_FUNC_CTL_A 0x60400
-#define PIPE_DDI_FUNC_CTL_B 0x61400
-#define PIPE_DDI_FUNC_CTL_C 0x62400
-#define PIPE_DDI_FUNC_CTL_EDP 0x6F400
-
-/* Pipe Configuration */
-#define PIPE_CONF_A 0x70008
-#define PIPE_CONF_B 0x71008
-#define PIPE_CONF_C 0x72008
-#define PIPE_CONF_EDP 0x7F008
-
-/* Audio registers */
-#define AUD_TCA_CONFIG 0x65000
-#define AUD_TCB_CONFIG 0x65100
-#define AUD_TCC_CONFIG 0x65200
-#define AUD_C1_MISC_CTRL 0x65010
-#define AUD_C2_MISC_CTRL 0x65110
-#define AUD_C3_MISC_CTRL 0x65210
-#define AUD_VID_DID 0x65020
-#define AUD_RID 0x65024
-#define AUD_TCA_M_CTS_ENABLE 0x65028
-#define AUD_TCB_M_CTS_ENABLE 0x65128
-#define AUD_TCC_M_CTS_ENABLE 0x65228
-#define AUD_PWRST 0x6504C
-#define AUD_TCA_EDID_DATA 0x65050
-#define AUD_TCB_EDID_DATA 0x65150
-#define AUD_TCC_EDID_DATA 0x65250
-#define AUD_TCA_INFOFR 0x65054
-#define AUD_TCB_INFOFR 0x65154
-#define AUD_TCC_INFOFR 0x65254
-#define AUD_PIPE_CONV_CFG 0x6507C
-#define AUD_C1_DIG_CNVT 0x65080
-#define AUD_C2_DIG_CNVT 0x65180
-#define AUD_C3_DIG_CNVT 0x65280
-#define AUD_C1_STR_DESC 0x65084
-#define AUD_C2_STR_DESC 0x65184
-#define AUD_C3_STR_DESC 0x65284
-#define AUD_OUT_CHAN_MAP 0x65088
-#define AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH 0x650A8
-#define AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH 0x651A8
-#define AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH 0x652A8
-#define AUD_PIPE_CONN_SEL_CTRL 0x650AC
-#define AUD_TCA_DIP_ELD_CTRL_ST 0x650b4
-#define AUD_TCB_DIP_ELD_CTRL_ST 0x651b4
-#define AUD_TCC_DIP_ELD_CTRL_ST 0x652b4
-#define AUD_PIN_ELD_CP_VLD 0x650C0
-#define AUD_HDMI_FIFO_STATUS 0x650D4
-
-/* Audio debug registers */
-#define AUD_ICOI 0x65f00
-#define AUD_IRII 0x65f04
-#define AUD_ICS 0x65f08
-#define AUD_CHICKENBIT_REG 0x65f10
-#define AUD_DP_DIP_STATUS 0x65f20
-#define AUD_TCA_M_CTS 0x65f44
-#define AUD_TCB_M_CTS 0x65f54
-#define AUD_TCC_M_CTS 0x65f64
-
-/* Video DIP Control */
-#define VIDEO_DIP_CTL_A 0x60200
-#define VIDEO_DIP_CTL_B 0x61200
-#define VIDEO_DIP_CTL_C 0x62200
-#define VIDEO_DIP_CTL_D 0x63200
-
-#define VIDEO_DIP_DATA 0x60220
-#define VIDEO_DIP_ECC 0x60240
-
-#define AUD_DP_DIP_STATUS 0x65f20
+#undef AUD_CNTL_ST2
+#undef AUD_HDMIW_STATUS
+#define PIPE_OFS 0x100
+
+#define AUD_CONFIG_A 0x0
+#define AUD_CONFIG_B (AUD_CONFIG_A + PIPE_OFS)
+#define AUD_MISC_CTRL_A 0x010
+#define AUD_MISC_CTRL_B (AUD_MISC_CTRL_A + PIPE_OFS)
+#define AUD_VID_DID 0x020
+#define AUD_RID 0x024
+#define AUD_CTS_ENABLE_A 0x028
+#define AUD_CTS_ENABLE_B (AUD_CTS_ENABLE_A + PIPE_OFS)
+#define AUD_PWRST 0x04C
+#define AUD_HDMIW_HDMIEDID_A 0x050
+#define AUD_HDMIW_HDMIEDID_B (AUD_HDMIW_HDMIEDID_A + PIPE_OFS)
+#define AUD_HDMIW_INFOFR_A 0x054
+#define AUD_HDMIW_INFOFR_B (AUD_HDMIW_INFOFR_A + PIPE_OFS)
+#define AUD_PORT_EN_HD_CFG 0x07c
+#define AUD_OUT_DIG_CNVT_A 0x080
+#define AUD_OUT_DIG_CNVT_B (AUD_OUT_DIG_CNVT_A + PIPE_OFS)
+#define AUD_OUT_STR_DESC_A 0x084
+#define AUD_OUT_STR_DESC_B (AUD_OUT_STR_DESC_A + PIPE_OFS)
+#define AUD_OUT_CH_STR 0x088
+#define AUD_PINW_CONNLNG_LIST 0x0a8
+#define AUD_PINW_CONNLNG_SEL 0x0aC
+#define AUD_CNTL_ST_A 0x0b4
+#define AUD_CNTL_ST_B (AUD_CNTL_ST_A + PIPE_OFS)
+#define AUD_CNTL_ST2 0x0c0
+#define AUD_HDMIW_STATUS 0x0d4
+
+/* Audio config registers of Haswell+ */
+#define AUD_TCA_CONFIG AUD_CONFIG_A
+#define AUD_TCB_CONFIG (AUD_TCA_CONFIG + PIPE_OFS)
+#define AUD_TCC_CONFIG (AUD_TCA_CONFIG + PIPE_OFS * 2)
+#define AUD_C1_MISC_CTRL AUD_MISC_CTRL_A
+#define AUD_C2_MISC_CTRL (AUD_MISC_CTRL_A + PIPE_OFS)
+#define AUD_C3_MISC_CTRL (AUD_MISC_CTRL_A + PIPE_OFS * 2)
+#define AUD_TCA_M_CTS_ENABLE AUD_CTS_ENABLE_A
+#define AUD_TCB_M_CTS_ENABLE (AUD_TCA_M_CTS_ENABLE + PIPE_OFS)
+#define AUD_TCC_M_CTS_ENABLE (AUD_TCA_M_CTS_ENABLE + PIPE_OFS * 2)
+#define AUD_TCA_EDID_DATA AUD_HDMIW_HDMIEDID_A
+#define AUD_TCB_EDID_DATA (AUD_TCA_EDID_DATA + PIPE_OFS)
+#define AUD_TCC_EDID_DATA (AUD_TCA_EDID_DATA + PIPE_OFS * 2)
+#define AUD_TCA_INFOFR AUD_HDMIW_INFOFR_A
+#define AUD_TCB_INFOFR (AUD_TCA_INFOFR + PIPE_OFS)
+#define AUD_TCC_INFOFR (AUD_TCA_INFOFR + PIPE_OFS * 2)
+#define AUD_PIPE_CONV_CFG AUD_PORT_EN_HD_CFG
+#define AUD_C1_DIG_CNVT AUD_OUT_DIG_CNVT_A
+#define AUD_C2_DIG_CNVT (AUD_C1_DIG_CNVT + PIPE_OFS)
+#define AUD_C3_DIG_CNVT (AUD_C1_DIG_CNVT + PIPE_OFS * 2)
+#define AUD_C1_STR_DESC AUD_OUT_STR_DESC_A
+#define AUD_C2_STR_DESC (AUD_C1_STR_DESC + PIPE_OFS)
+#define AUD_C3_STR_DESC (AUD_C1_STR_DESC + PIPE_OFS * 2)
+#define AUD_OUT_CHAN_MAP AUD_OUT_CH_STR
+#define AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH AUD_PINW_CONNLNG_LIST
+#define AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH (AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + PIPE_OFS)
+#define AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH (AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + PIPE_OFS * 2)
+#define AUD_PIPE_CONN_SEL_CTRL AUD_PINW_CONNLNG_SEL
+#define AUD_TCA_DIP_ELD_CTRL_ST AUD_CNTL_ST_A
+#define AUD_TCB_DIP_ELD_CTRL_ST (AUD_TCA_DIP_ELD_CTRL_ST + PIPE_OFS)
+#define AUD_TCC_DIP_ELD_CTRL_ST (AUD_TCA_DIP_ELD_CTRL_ST + PIPE_OFS * 2)
+#define AUD_PIN_ELD_CP_VLD AUD_CNTL_ST2
+#define AUD_HDMI_FIFO_STATUS AUD_HDMIW_STATUS
+#define AUD_ICOI 0xf00
+#define AUD_IRII 0xf04
+#define AUD_ICS 0xf08
+#define AUD_CHICKENBIT_REG 0xf10
+#define AUD_DP_DIP_STATUS 0xf20
+#define AUD_TCA_M_CTS 0xf44
+#define AUD_TCB_M_CTS 0xf54
+#define AUD_TCC_M_CTS 0xf64
+
+/* Common functions to dump audio registers */
#define MAX_PREFIX_SIZE 128
-static void dump_ddi_buf_ctl(int port)
-{
- uint32_t dword;
-
- dword = INREG(DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
- printf("DDI %c Buffer control\n", 'A' + port - PORT_A);
- printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 3, 1),
- OPNAME(dp_port_width, BITS(dword, 3, 1)));
- printf("\tDDI Buffer Enable\t\t\t\t%ld\n", BIT(dword, 31));
-}
-
-static void dump_ddi_func_ctl(int pipe)
-{
- uint32_t dword;
-
- dword = INREG(PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000);
- printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A);
- printf("\tBITS per color\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 22, 20),
- OPNAME(bits_per_color, BITS(dword, 22, 20)));
- printf("\tPIPE DDI Mode\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 26, 24),
- OPNAME(ddi_mode, BITS(dword, 26, 24)));
- printf("\tPIPE DDI selection\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 28),
- OPNAME(trans_to_port_sel, BITS(dword, 30, 28)));
- printf("\tPIPE DDI Function Enable\t\t\t[0x%lx]\n", BIT(dword, 31));
-}
-
-static void dump_aud_transcoder_config(int transcoder)
+static void dump_aud_config(int index)
{
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
- dword = INREG(AUD_TCA_CONFIG + (transcoder - TRANSCODER_A) * 0x100);
- sprintf(prefix, "AUD_TC%c_CONFIG", 'A' + transcoder - TRANSCODER_A);
+ if (!IS_HASWELL_PLUS(devid)) {
+ dword = INREG(aud_reg_base + AUD_CONFIG_A + (index - PIPE_A) * 0x100);
+ sprintf(prefix, "AUD_CONFIG_%c ", 'A' + index - PIPE_A);
+ } else {
+ dword = INREG(aud_reg_base + AUD_TCA_CONFIG + (index - TRANSCODER_A) * 0x100);
+ sprintf(prefix, "AUD_TC%c_CONFIG", 'A' + index - TRANSCODER_A);
+ }
printf("%s Disable_NCTS\t\t\t\t%lu\n", prefix, BIT(dword, 3));
printf("%s Lower_N_value\t\t\t\t0x%03lx\n", prefix, BITS(dword, 15, 4));
@@ -1785,13 +1354,18 @@ static void dump_aud_transcoder_config(int transcoder)
OPNAME(n_index_value, BIT(dword, 29)));
}
-static void dump_aud_misc_control(int converter)
+static void dump_aud_misc_control(int index)
{
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
- dword = INREG(AUD_C1_MISC_CTRL + (converter - CONVERTER_1) * 0x100);
- sprintf(prefix, "AUD_C%c_MISC_CTRL", '1' + converter - CONVERTER_1);
+ if (!IS_HASWELL_PLUS(devid)) {
+ dword = INREG(aud_reg_base + AUD_MISC_CTRL_A + (index - PIPE_A) * 0x100);
+ sprintf(prefix, "AUD_MISC_CTRL_%c ", 'A' + index - PIPE_A);
+ } else {
+ dword = INREG(aud_reg_base + AUD_C1_MISC_CTRL + (index - CONVERTER_1) * 0x100);
+ sprintf(prefix, "AUD_C%c_MISC_CTRL", '1' + index - CONVERTER_1);
+ }
printf("%s Pro_Allowed\t\t\t\t%lu\n", prefix, BIT(dword, 1));
printf("%s Sample_Fabrication_EN_bit\t\t%lu\n", prefix, BIT(dword, 2));
@@ -1803,7 +1377,7 @@ static void dump_aud_vendor_device_id(void)
{
uint32_t dword;
- dword = INREG(AUD_VID_DID);
+ dword = INREG(aud_reg_base + AUD_VID_DID);
printf("AUD_VID_DID device id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 0));
printf("AUD_VID_DID vendor id\t\t\t\t\t0x%lx\n", BITS(dword, 31, 16));
}
@@ -1812,20 +1386,25 @@ static void dump_aud_revision_id(void)
{
uint32_t dword;
- dword = INREG(AUD_RID);
+ dword = INREG(aud_reg_base + AUD_RID);
printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0));
printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8));
printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16));
printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20));
}
-static void dump_aud_m_cts_enable(int transcoder)
+static void dump_aud_m_cts_enable(int index)
{
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
- dword = INREG(AUD_TCA_M_CTS_ENABLE + (transcoder - TRANSCODER_A) * 0x100);
- sprintf(prefix, "AUD_TC%c_M_CTS_ENABLE", 'A' + transcoder - TRANSCODER_A);
+ if (!IS_HASWELL_PLUS(devid)) {
+ dword = INREG(aud_reg_base + AUD_CTS_ENABLE_A + (index - PIPE_A) * 0x100);
+ sprintf(prefix, "AUD_CTS_ENABLE_%c ", 'A' + index - PIPE_A);
+ } else {
+ dword = INREG(aud_reg_base + AUD_TCA_M_CTS_ENABLE + (index - TRANSCODER_A) * 0x100);
+ sprintf(prefix, "AUD_TC%c_M_CTS_ENABLE", 'A' + index - TRANSCODER_A);
+ }
printf("%s CTS_programming\t\t\t%#lx\n", prefix, BITS(dword, 19, 0));
printf("%s Enable_CTS_or_M_programming\t%lu\n", prefix, BIT(dword, 20));
@@ -1835,60 +1414,140 @@ static void dump_aud_m_cts_enable(int transcoder)
static void dump_aud_power_state(void)
{
uint32_t dword;
+ int num_pipes;
- dword = INREG(AUD_PWRST);
+ dword = INREG(aud_reg_base + AUD_PWRST);
printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]);
printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]);
printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]);
printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 7, 6)]);
printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]);
printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]);
- printf("AUD_PWRST Convertor1_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]);
- printf("AUD_PWRST Convertor1_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]);
- printf("AUD_PWRST Convertor2_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]);
- printf("AUD_PWRST Convertor2_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]);
- printf("AUD_PWRST Convertor3_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 21, 20)]);
- printf("AUD_PWRST Convertor3_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 23, 22)]);
- printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]);
- printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]);
+
+ if (!IS_HASWELL_PLUS(devid)) {
+ printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]);
+ printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]);
+ printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]);
+ printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]);
+ } else {
+ printf("AUD_PWRST Convertor1_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]);
+ printf("AUD_PWRST Convertor1_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]);
+ printf("AUD_PWRST Convertor2_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]);
+ printf("AUD_PWRST Convertor2_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]);
+ }
+
+ num_pipes = get_num_pipes();
+ if (num_pipes == 2) {
+ printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 21, 20)]);
+ printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 23, 22)]);
+ } else { /* 3 pipes */
+ if (!IS_HASWELL_PLUS(devid)) {
+ printf("AUD_PWRST ConvertorC_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 21, 20)]);
+ printf("AUD_PWRST ConvertorC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 23, 22)]);
+ } else {
+ printf("AUD_PWRST Convertor3_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 21, 20)]);
+ printf("AUD_PWRST Convertor3_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 23, 22)]);
+ }
+ printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]);
+ printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]);
+ }
}
-static void dump_aud_edid_data(int transcoder)
+static void dump_aud_edid_data(int index)
{
uint32_t dword;
int i;
- int offset = (transcoder - TRANSCODER_A) * 0x100;
+ int offset;
+ int aud_ctrl_st, edid_data;
+
+ if (IS_HASWELL_PLUS(devid)) {
+ offset = (index - TRANSCODER_A) * 0x100;
+ aud_ctrl_st = aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset;
+ edid_data = aud_reg_base + AUD_TCA_EDID_DATA + offset;
+ printf("AUD_TC%c_EDID_DATA ELD:\n\t", 'A' + index - TRANSCODER_A);
+ } else {
+ offset = (index - PIPE_A) * 0x100;
+ aud_ctrl_st = aud_reg_base + AUD_CNTL_ST_A + offset;
+ edid_data = aud_reg_base + AUD_HDMIW_HDMIEDID_A + offset;
+ printf("AUD_HDMIW_HDMIEDID_%c HDMI ELD:\n\t", 'A' + index - PIPE_A);
+ }
- printf("AUD_TC%c_EDID_DATA ELD:\n\t", 'A' + transcoder - TRANSCODER_A);
- dword = INREG(AUD_TCA_DIP_ELD_CTRL_ST + offset);
+ dword = INREG(aud_ctrl_st);
dword &= ~BITMASK(9, 5);
- OUTREG(AUD_TCA_DIP_ELD_CTRL_ST + offset, dword);
+ OUTREG(aud_ctrl_st, dword);
for (i = 0; i < BITS(dword, 14, 10) / 4; i++)
- printf("%08x ", htonl(INREG(AUD_TCA_EDID_DATA + offset)));
+ printf("%08x ", htonl(INREG(edid_data)));
printf("\n");
}
-static void dump_aud_infoframe(int transcoder)
+static void dump_aud_infoframe(int index)
{
uint32_t dword;
int i;
- int offset = (transcoder - TRANSCODER_A) * 0x100;
+ int offset;
+ int aud_ctrl_st, info_frm;
+
+ if (IS_HASWELL_PLUS(devid)) {
+ offset = (index - TRANSCODER_A) * 0x100;
+ aud_ctrl_st = aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset;
+ info_frm = aud_reg_base + AUD_TCA_INFOFR + offset;
+ printf("AUD_TC%c_INFOFR audio Infoframe:\n\t", 'A' + index - TRANSCODER_A);
+ } else {
+ offset = (index - PIPE_A) * 0x100;
+ aud_ctrl_st = aud_reg_base + AUD_CNTL_ST_A + offset;
+ info_frm = aud_reg_base + AUD_HDMIW_INFOFR_A + offset;
+ printf("AUD_HDMIW_INFOFR_%c HDMI audio Infoframe:\n\t", 'A' + index - PIPE_A);
+ }
- printf("AUD_TC%c_INFOFR audio Infoframe:\n\t", 'A' + transcoder - TRANSCODER_A);
- dword = INREG(AUD_TCA_DIP_ELD_CTRL_ST + offset);
+ dword = INREG(aud_ctrl_st);
dword &= ~BITMASK(20, 18);
dword &= ~BITMASK(3, 0);
- OUTREG(AUD_TCA_DIP_ELD_CTRL_ST + offset, dword);
+ OUTREG(aud_ctrl_st, dword);
for (i = 0; i < 8; i++)
- printf("%08x ", htonl(INREG(AUD_TCA_INFOFR + offset)));
+ printf("%08x ", htonl(INREG(info_frm)));
printf("\n");
}
+static void dump_aud_port_en_hd_cfg(void)
+{
+ uint32_t dword;
+ int num_pipes = get_num_pipes();
+
+ dword = INREG(aud_reg_base + AUD_PORT_EN_HD_CFG);
+ if (num_pipes == 2) {
+ printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0));
+ printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1));
+ printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", BITS(dword, 7, 4));
+ printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", BITS(dword, 11, 8));
+
+ printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 12));
+ printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 13));
+ printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 14));
+ printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 16));
+ printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 17));
+ printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 18));
+ } else { /* three pipes */
+ printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0));
+ printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1));
+ printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", BIT(dword, 2));
+ printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", BITS(dword, 7, 4));
+ printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", BITS(dword, 11, 8));
+ printf("AUD_PORT_EN_HD_CFG Convertor_C_Stream_ID\t\t%lu\n", BITS(dword, 15, 12));
+
+ printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 16));
+ printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 17));
+ printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 18));
+ printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 20));
+ printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21));
+ printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22));
+ }
+}
+
static void dump_aud_pipe_conv_cfg(void)
{
uint32_t dword;
- dword = INREG(AUD_PIPE_CONV_CFG);
+ dword = INREG(aud_reg_base + AUD_PIPE_CONV_CFG);
printf("AUD_PIPE_CONV_CFG Convertor_1_Digen\t\t\t%lu\n", BIT(dword, 0));
printf("AUD_PIPE_CONV_CFG Convertor_2_Digen\t\t\t%lu\n", BIT(dword, 1));
printf("AUD_PIPE_CONV_CFG Convertor_3_Digen\t\t\t%lu\n", BIT(dword, 2));
@@ -1903,13 +1562,18 @@ static void dump_aud_pipe_conv_cfg(void)
printf("AUD_PIPE_CONV_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22));
}
-static void dump_aud_dig_cnvt(int converter)
+static void dump_aud_dig_cnvt(int index)
{
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
- dword = INREG(AUD_C1_DIG_CNVT + (converter - CONVERTER_1) * 0x100);
- sprintf(prefix, "AUD_C%c_DIG_CNVT", '1' + converter - CONVERTER_1);
+ if (!IS_HASWELL_PLUS(devid)) {
+ dword = INREG(aud_reg_base + AUD_OUT_DIG_CNVT_A + (index - PIPE_A) * 0x100);
+ sprintf(prefix, "AUD_OUT_DIG_CNVT_%c", 'A' + index - PIPE_A);
+ } else {
+ dword = INREG(aud_reg_base + AUD_C1_DIG_CNVT + (index - CONVERTER_1) * 0x100);
+ sprintf(prefix, "AUD_C%c_DIG_CNVT ", '1' + index - CONVERTER_1);
+ }
printf("%s V\t\t\t\t\t%lu\n", prefix, BIT(dword, 1));
printf("%s VCFG\t\t\t\t\t%lu\n", prefix, BIT(dword, 2));
@@ -1923,14 +1587,19 @@ static void dump_aud_dig_cnvt(int converter)
printf("%s Stream_ID\t\t\t\t%lu\n", prefix, BITS(dword, 23, 20));
}
-static void dump_aud_str_desc(int converter)
+static void dump_aud_str_desc(int index)
{
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
uint32_t rate;
- dword = INREG(AUD_C1_STR_DESC + (converter - CONVERTER_1) * 0x100);
- sprintf(prefix, "AUD_C%c_STR_DESC", '1' + converter - CONVERTER_1);
+ if (!IS_HASWELL_PLUS(devid)) {
+ dword = INREG(aud_reg_base + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100);
+ sprintf(prefix, "AUD_OUT_STR_DESC_%c", 'A' + index - PIPE_A);
+ } else {
+ dword = INREG(aud_reg_base + AUD_C1_STR_DESC + (index - CONVERTER_1) * 0x100);
+ sprintf(prefix, "AUD_C%c_STR_DESC ", '1' + index - CONVERTER_1);
+ }
printf("%s Number_of_Channels_in_a_Stream\t\t%lu\n", prefix, 1 + BITS(dword, 3, 0));
printf("%s Bits_per_Sample\t\t\t[%#lx] %s\n", prefix, BITS(dword, 6, 4),
@@ -1947,8 +1616,12 @@ static void dump_aud_str_desc(int converter)
printf("=> Sample Rate %d Hz\n", rate);
printf("%s Convertor_Channel_Count\t\t%lu\n", prefix, BITS(dword, 20, 16) + 1);
+
+ if (!IS_HASWELL_PLUS(devid))
+ printf("%s HBR_enable\t\t\t\t%lu\n", prefix, BITS(dword, 28, 27));
}
+#define dump_aud_out_ch_str dump_aud_out_chan_map
static void dump_aud_out_chan_map(void)
{
uint32_t dword;
@@ -1956,8 +1629,8 @@ static void dump_aud_out_chan_map(void)
printf("AUD_OUT_CHAN_MAP Converter_Channel_MAP PORTB PORTC PORTD\n");
for (i = 0; i < 8; i++) {
- OUTREG(AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16));
- dword = INREG(AUD_OUT_CHAN_MAP);
+ OUTREG(aud_reg_base + AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16));
+ dword = INREG(aud_reg_base + AUD_OUT_CHAN_MAP);
printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n",
1 + BITS(dword, 3, 0),
1 + BITS(dword, 7, 4),
@@ -1966,37 +1639,53 @@ static void dump_aud_out_chan_map(void)
}
}
-static void dump_aud_connect_list_entry_length(int transcoder)
+static void dump_aud_connect_list(void)
{
uint32_t dword;
char prefix[MAX_PREFIX_SIZE];
- dword = INREG(AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
- sprintf(prefix, "AUD_TC%c_PIN_PIPE_CONN_ENTRY_LNGTH", 'A' + transcoder - TRANSCODER_A);
+ dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_LIST);
+ sprintf(prefix, "AUD_PINW_CONNLNG_LIST");
printf("%s Connect_List_Length\t%lu\n", prefix, BITS(dword, 6, 0));
printf("%s Form \t\t[%#lx] %s\n", prefix, BIT(dword, 7),
OPNAME(connect_list_form, BIT(dword, 7)));
- printf("%s Connect_List_Entry\t%lu\n", prefix, BITS(dword, 15, 8));
+ printf("%s Connect_List_Entry\t\t%lu, %lu\n", prefix, BITS(dword, 15, 8), BITS(dword, 23, 16));
}
-static void dump_aud_connect_select_ctrl(void)
+static void dump_aud_connect_select(void)
{
uint32_t dword;
+ char prefix[MAX_PREFIX_SIZE];
- dword = INREG(AUD_PIPE_CONN_SEL_CTRL);
- printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_B\t%#lx\n", BITS(dword, 7, 0));
- printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_C\t%#lx\n", BITS(dword, 15, 8));
- printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_D\t%#lx\n", BITS(dword, 23, 16));
+ if (IS_HASWELL_PLUS(devid)) {
+ dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
+ sprintf(prefix, "AUD_PIPE_CONN_SEL_CTRL");
+
+ } else {
+ dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_SEL);
+ sprintf(prefix, "AUD_PINW_CONNLNG_SEL ");
+ }
+
+ printf("%s Connection_select_Port_B\t%#lx\n", prefix, BITS(dword, 7, 0));
+ printf("%s Connection_select_Port_C\t%#lx\n", prefix, BITS(dword, 15, 8));
+ printf("%s Connection_select_Port_D\t%#lx\n", prefix, BITS(dword, 23, 16));
}
-static void dump_aud_dip_eld_ctrl_st(int transcoder)
+static void dump_aud_ctrl_state(int index)
{
uint32_t dword;
- int offset = (transcoder - TRANSCODER_A) * 0x100;
-
- dword = INREG(AUD_TCA_DIP_ELD_CTRL_ST + offset);
- printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + transcoder - TRANSCODER_A);
+ int offset;
+
+ if (IS_HASWELL_PLUS(devid)) {
+ offset = (index - TRANSCODER_A) * 0x100;
+ dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
+ printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + index - TRANSCODER_A);
+ } else {
+ offset = (index - PIPE_A) * 0x100;
+ dword = INREG(aud_reg_base + AUD_CNTL_ST_A + offset);
+ printf("Audio control state - Pipe %c\n", 'A' + index - PIPE_A);
+ }
printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4));
printf("\tELD_buffer_size\t\t\t\t\t%lu\n", BITS(dword, 14, 10));
@@ -2011,11 +1700,25 @@ static void dump_aud_dip_eld_ctrl_st(int transcoder)
printf("\n");
}
+static void dump_aud_ctrl_state2(void)
+{
+ uint32_t dword;
+
+ dword = INREG(aud_reg_base + AUD_CNTL_ST2);
+ printf("AUD_CNTL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0));
+ printf("AUD_CNTL_ST2 CP_ReadyB\t\t\t\t\t%lu\n", BIT(dword, 1));
+ printf("AUD_CNTL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4));
+ printf("AUD_CNTL_ST2 CP_ReadyC\t\t\t\t\t%lu\n", BIT(dword, 5));
+ printf("AUD_CNTL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8));
+ printf("AUD_CNTL_ST2 CP_ReadyD\t\t\t\t\t%lu\n", BIT(dword, 9));
+}
+
+/* for hsw+ */
static void dump_aud_eld_cp_vld(void)
{
uint32_t dword;
- dword = INREG(AUD_PIN_ELD_CP_VLD);
+ dword = INREG(aud_reg_base + AUD_PIN_ELD_CP_VLD);
printf("AUD_PIN_ELD_CP_VLD Transcoder_A ELD_valid\t\t%lu\n", BIT(dword, 0));
printf("AUD_PIN_ELD_CP_VLD Transcoder_A CP_Ready \t\t%lu\n", BIT(dword, 1));
printf("AUD_PIN_ELD_CP_VLD Transcoder_A Out_enable\t\t%lu\n", BIT(dword, 2));
@@ -2030,11 +1733,312 @@ static void dump_aud_eld_cp_vld(void)
printf("AUD_PIN_ELD_CP_VLD Transcoder_C Inactive\t\t%lu\n", BIT(dword, 11));
}
-static void dump_hdmi_fifo_status(void)
+static void dump_aud_hdmi_status(void)
+{
+ uint32_t dword;
+
+ dword = INREG(aud_reg_base + AUD_HDMIW_STATUS);
+ printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
+ printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25));
+ printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28));
+ printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29));
+ printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30));
+ printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31));
+}
+
+/*
+ * IronLake display registers
+ */
+#undef DP_CTL_B
+#undef DP_CTL_C
+#undef DP_CTL_D
+
+#define DP_CTL_B 0x4100
+#define DP_CTL_C 0x4200
+#define DP_CTL_D 0x4300
+
+#define HDMI_CTL_B 0x1140
+#define HDMI_CTL_C 0x1150
+#define HDMI_CTL_D 0x1160
+
+static void dump_dp_port_ctrl(int port)
+{
+ uint32_t dword;
+ int port_ctrl;
+ char prefix[MAX_PREFIX_SIZE];
+
+ sprintf(prefix, "DP_%c", 'B' + port - PORT_B);
+
+ port_ctrl = disp_reg_base + DP_CTL_B + (port - PORT_B) * 0x100;
+ dword = INREG(port_ctrl);
+ printf("%s DisplayPort_Enable\t\t\t\t\t%lu\n", prefix, BIT(dword, 31));
+ printf("%s Transcoder_Select\t\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
+ printf("%s Port_Width_Selection\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 21, 19),
+ dp_port_width[BITS(dword, 21, 19)]);
+ printf("%s Port_Detected\t\t\t\t\t%lu\n", prefix, BIT(dword, 2));
+ printf("%s HDCP_Port_Select\t\t\t\t\t%lu\n", prefix, BIT(dword, 5));
+ printf("%s Audio_Output_Enable\t\t\t\t%lu\n", prefix, BIT(dword, 6));
+}
+
+static void dump_hdmi_port_ctrl(int port)
+{
+ uint32_t dword;
+ int port_ctrl;
+ char prefix[MAX_PREFIX_SIZE];
+
+ sprintf(prefix, "HDMI%c", 'B' + port - PORT_B);
+
+ port_ctrl = disp_reg_base + HDMI_CTL_B + (port - PORT_B) * 0x10;
+ dword = INREG(port_ctrl);
+ printf("%s HDMI_Enable\t\t\t\t\t%u\n", prefix, !!(dword & SDVO_ENABLE));
+ printf("%s Transcoder_Select\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A");
+ printf("%s HDCP_Port_Select\t\t\t\t%lu\n", prefix, BIT(dword, 5));
+ if (port == PORT_B) /* TODO: check spec, not found in Ibx b-spec, and only for port B? */
+ printf("%s SDVO Hot Plug Interrupt Detect Enable\t%lu\n", prefix, BIT(dword, 23));
+ printf("%s Digital_Port_Detected\t\t\t%lu\n", prefix, BIT(dword, 2));
+ printf("%s Encoding\t\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 11, 10),
+ sdvo_hdmi_encoding[BITS(dword, 11, 10)]);
+ printf("%s Null_packets_enabled_during_Vsync\t\t%u\n", prefix, !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
+ printf("%s Audio_Output_Enable\t\t\t\t%u\n", prefix, !!(dword & SDVO_AUDIO_ENABLE));
+}
+
+static void dump_ironlake(void)
+{
+ uint32_t dword;
+
+ set_reg_base(0xe0000, 0x2000);
+
+ dump_disp_reg(HDMI_CTL_B, "sDVO/HDMI Port B Control");
+ dump_disp_reg(HDMI_CTL_C, "HDMI Port C Control");
+ dump_disp_reg(HDMI_CTL_D, "HDMI Port D Control");
+ dump_disp_reg(DP_CTL_B, "DisplayPort B Control Register");
+ dump_disp_reg(DP_CTL_C, "DisplayPort C Control Register");
+ dump_disp_reg(DP_CTL_D, "DisplayPort D Control Register");
+
+ dump_aud_reg(AUD_CONFIG_A, "Audio Configuration - Transcoder A");
+ dump_aud_reg(AUD_CONFIG_B, "Audio Configuration - Transcoder B");
+ dump_aud_reg(AUD_CTS_ENABLE_A, "Audio CTS Programming Enable - Transcoder A");
+ dump_aud_reg(AUD_CTS_ENABLE_B, "Audio CTS Programming Enable - Transcoder B");
+ dump_aud_reg(AUD_MISC_CTRL_A, "Audio MISC Control for Transcoder A");
+ dump_aud_reg(AUD_MISC_CTRL_B, "Audio MISC Control for Transcoder B");
+ dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID");
+ dump_aud_reg(AUD_RID, "Audio Revision ID");
+ dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)");
+ dump_aud_reg(AUD_PORT_EN_HD_CFG, "Audio Port Enable HDAudio Config");
+ dump_aud_reg(AUD_OUT_DIG_CNVT_A, "Audio Digital Converter - Conv A");
+ dump_aud_reg(AUD_OUT_DIG_CNVT_B, "Audio Digital Converter - Conv B");
+ dump_aud_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID");
+ dump_aud_reg(AUD_OUT_STR_DESC_A, "Audio Stream Descriptor Format - Conv A");
+ dump_aud_reg(AUD_OUT_STR_DESC_B, "Audio Stream Descriptor Format - Conv B");
+ dump_aud_reg(AUD_PINW_CONNLNG_LIST, "Audio Connection List");
+ dump_aud_reg(AUD_PINW_CONNLNG_SEL, "Audio Connection Select");
+ dump_aud_reg(AUD_CNTL_ST_A, "Audio Control State Register - Transcoder A");
+ dump_aud_reg(AUD_CNTL_ST_B, "Audio Control State Register - Transcoder B");
+ dump_aud_reg(AUD_CNTL_ST2, "Audio Control State 2");
+ dump_aud_reg(AUD_HDMIW_STATUS, "Audio HDMI Status");
+ dump_aud_reg(AUD_HDMIW_HDMIEDID_A, "HDMI Data EDID Block - Transcoder A");
+ dump_aud_reg(AUD_HDMIW_HDMIEDID_B, "HDMI Data EDID Block - Transcoder B");
+ dump_aud_reg(AUD_HDMIW_INFOFR_A, "Audio Widget Data Island Packet - Transcoder A");
+ dump_aud_reg(AUD_HDMIW_INFOFR_B, "Audio Widget Data Island Packet - Transcoder B");
+
+ printf("\nDetails:\n\n");
+
+ dump_aud_vendor_device_id();
+ dump_aud_revision_id();
+
+ dump_hdmi_port_ctrl(PORT_B);
+ dump_hdmi_port_ctrl(PORT_C);
+ dump_hdmi_port_ctrl(PORT_D);
+
+ dump_dp_port_ctrl(PORT_B);
+ dump_dp_port_ctrl(PORT_C);
+ dump_dp_port_ctrl(PORT_D);
+
+ dump_aud_config(PIPE_A);
+ dump_aud_config(PIPE_B);
+
+ dump_aud_m_cts_enable(PIPE_A);
+ dump_aud_m_cts_enable(PIPE_B);
+
+ dump_aud_misc_control(PIPE_A);
+ dump_aud_misc_control(PIPE_B);
+
+ dump_aud_power_state();
+ dump_aud_port_en_hd_cfg();
+
+ dump_aud_dig_cnvt(PIPE_A);
+ dump_aud_dig_cnvt(PIPE_B);
+
+ dump_aud_out_ch_str();
+
+ dump_aud_str_desc(PIPE_A);
+ dump_aud_str_desc(PIPE_B);
+
+ dump_aud_connect_list();
+ dump_aud_connect_select();
+
+ dump_aud_ctrl_state(PIPE_A);
+ dump_aud_ctrl_state(PIPE_B);
+ dump_aud_ctrl_state2();
+
+ dump_aud_hdmi_status();
+
+ dump_aud_edid_data(PIPE_A);
+ dump_aud_edid_data(PIPE_B);
+
+ dump_aud_infoframe(PIPE_A);
+ dump_aud_infoframe(PIPE_B);
+}
+
+#undef VIDEO_DIP_CTL_A
+#undef VIDEO_DIP_CTL_B
+#undef VIDEO_DIP_CTL_C
+#undef VIDEO_DIP_CTL_D
+#undef VIDEO_DIP_DATA
+
+/*
+ * Haswell+ display registers
+ */
+
+/* DisplayPort Transport Control */
+#define DP_TP_CTL_A 0x64040
+#define DP_TP_CTL_B 0x64140
+#define DP_TP_CTL_C 0x64240
+#define DP_TP_CTL_D 0x64340
+#define DP_TP_CTL_E 0x64440
+
+/* DisplayPort Transport Status */
+#define DP_TP_ST_A 0x64044
+#define DP_TP_ST_B 0x64144
+#define DP_TP_ST_C 0x64244
+#define DP_TP_ST_D 0x64344
+#define DP_TP_ST_E 0x64444
+
+/* DDI Buffer Control */
+#define DDI_BUF_CTL_A 0x64000
+#define DDI_BUF_CTL_B 0x64100
+#define DDI_BUF_CTL_C 0x64200
+#define DDI_BUF_CTL_D 0x64300
+#define DDI_BUF_CTL_E 0x64400
+
+/* DDI Buffer Translation */
+#define DDI_BUF_TRANS_A 0x64e00
+#define DDI_BUF_TRANS_B 0x64e60
+#define DDI_BUF_TRANS_C 0x64ec0
+#define DDI_BUF_TRANS_D 0x64f20
+#define DDI_BUF_TRANS_E 0x64f80
+
+/* DDI Aux Channel */
+#define DDI_AUX_CHANNEL_CTRL 0x64010
+#define DDI_AUX_DATA 0x64014
+#define DDI_AUX_TST 0x64028
+
+/* DDI CRC Control */
+#define DDI_CRC_CTL_A 0x64050
+#define DDI_CRC_CTL_B 0x64150
+#define DDI_CRC_CTL_C 0x64250
+#define DDI_CRC_CTL_D 0x64350
+#define DDI_CRC_CTL_E 0x64450
+
+/* Pipe DDI Function Control */
+#define PIPE_DDI_FUNC_CTL_A 0x60400
+#define PIPE_DDI_FUNC_CTL_B 0x61400
+#define PIPE_DDI_FUNC_CTL_C 0x62400
+#define PIPE_DDI_FUNC_CTL_EDP 0x6F400
+
+/* Pipe Configuration */
+#define PIPE_CONF_A 0x70008
+#define PIPE_CONF_B 0x71008
+#define PIPE_CONF_C 0x72008
+#define PIPE_CONF_EDP 0x7F008
+
+/* Video DIP Control */
+#define VIDEO_DIP_CTL_A 0x60200
+#define VIDEO_DIP_CTL_B 0x61200
+#define VIDEO_DIP_CTL_C 0x62200
+#define VIDEO_DIP_CTL_D 0x63200
+
+#define VIDEO_DIP_DATA 0x60220
+#define VIDEO_DIP_ECC 0x60240
+
+static void dump_ddi_buf_ctl(int port)
+{
+ uint32_t dword;
+
+ dword = INREG(DDI_BUF_CTL_A + (port - PORT_A) * 0x100);
+ printf("DDI %c Buffer control\n", 'A' + port - PORT_A);
+
+ printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 3, 1),
+ OPNAME(dp_port_width, BITS(dword, 3, 1)));
+ printf("\tDDI Buffer Enable\t\t\t\t%ld\n", BIT(dword, 31));
+}
+
+static void dump_ddi_func_ctl(int pipe)
+{
+ uint32_t dword;
+
+ dword = INREG(PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000);
+ printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A);
+
+ printf("\tBITS per color\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 22, 20),
+ OPNAME(bits_per_color, BITS(dword, 22, 20)));
+ printf("\tPIPE DDI Mode\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 26, 24),
+ OPNAME(ddi_mode, BITS(dword, 26, 24)));
+ printf("\tPIPE DDI selection\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 28),
+ OPNAME(trans_to_port_sel, BITS(dword, 30, 28)));
+ printf("\tPIPE DDI Function Enable\t\t\t[0x%lx]\n", BIT(dword, 31));
+}
+
+static void dump_aud_connect_list_entry_length(int transcoder)
+{
+ uint32_t dword;
+ char prefix[MAX_PREFIX_SIZE];
+
+ dword = INREG(aud_reg_base + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100);
+ sprintf(prefix, "AUD_TC%c_PIN_PIPE_CONN_ENTRY_LNGTH", 'A' + transcoder - TRANSCODER_A);
+
+ printf("%s Connect_List_Length\t%lu\n", prefix, BITS(dword, 6, 0));
+ printf("%s Form \t\t[%#lx] %s\n", prefix, BIT(dword, 7),
+ OPNAME(connect_list_form, BIT(dword, 7)));
+ printf("%s Connect_List_Entry\t%lu\n", prefix, BITS(dword, 15, 8));
+}
+
+static void dump_aud_connect_select_ctrl(void)
+{
+ uint32_t dword;
+
+ dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL);
+ printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_B\t%#lx\n", BITS(dword, 7, 0));
+ printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_C\t%#lx\n", BITS(dword, 15, 8));
+ printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_D\t%#lx\n", BITS(dword, 23, 16));
+}
+
+static void dump_aud_dip_eld_ctrl_st(int transcoder)
+{
+ uint32_t dword;
+ int offset = (transcoder - TRANSCODER_A) * 0x100;
+
+ dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset);
+ printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + transcoder - TRANSCODER_A);
+
+ printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4));
+ printf("\tELD_buffer_size\t\t\t\t\t%lu\n", BITS(dword, 14, 10));
+ printf("\tDIP_transmission_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16),
+ dip_trans[BITS(dword, 17, 16)]);
+ printf("\tDIP Buffer Index \t\t\t\t[0x%lx] %s\n", BITS(dword, 20, 18),
+ dip_index[BITS(dword, 20, 18)]);
+ printf("\tAudio DIP type enable status\t\t\t[0x%04lx] %s, %s, %s\n", BITS(dword, 24, 21),
+ dip_type[BIT(dword, 21)], dip_gen1_state[BIT(dword, 22)], dip_gen2_state[BIT(dword, 23)]);
+ printf("\tAudio DIP port select\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29),
+ dip_port[BITS(dword, 30, 29)]);
+ printf("\n");
+}
+
+static void dump_aud_hdmi_fifo_status(void)
{
uint32_t dword;
- dword = INREG(AUD_HDMI_FIFO_STATUS);
+ dword = INREG(aud_reg_base + AUD_HDMI_FIFO_STATUS);
printf("AUD_HDMI_FIFO_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24));
printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26));
printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27));
@@ -2070,6 +2074,8 @@ static void dump_hsw_plus(void)
uint32_t dword;
int i;
+ set_aud_reg_base(0x65000);
+
/* HSW DDI Buffer */
dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controler A");
dump_reg(DDI_BUF_CTL_B, "DDI Buffer Controler B");
@@ -2102,51 +2108,51 @@ static void dump_hsw_plus(void)
dump_reg(DP_TP_ST_E, "DisplayPort Transport E Status");
/* HSW North Display Audio */
- dump_reg(AUD_TCA_CONFIG, "Audio Configuration - Transcoder A");
- dump_reg(AUD_TCB_CONFIG, "Audio Configuration - Transcoder B");
- dump_reg(AUD_TCC_CONFIG, "Audio Configuration - Transcoder C");
- dump_reg(AUD_C1_MISC_CTRL, "Audio Converter 1 MISC Control");
- dump_reg(AUD_C2_MISC_CTRL, "Audio Converter 2 MISC Control");
- dump_reg(AUD_C3_MISC_CTRL, "Audio Converter 3 MISC Control");
- dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID");
- dump_reg(AUD_RID, "Audio Revision ID");
- dump_reg(AUD_TCA_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder A");
- dump_reg(AUD_TCB_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder B");
- dump_reg(AUD_TCC_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder C");
- dump_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)");
- dump_reg(AUD_TCA_EDID_DATA, "Audio EDID Data Block - Transcoder A");
- dump_reg(AUD_TCB_EDID_DATA, "Audio EDID Data Block - Transcoder B");
- dump_reg(AUD_TCC_EDID_DATA, "Audio EDID Data Block - Transcoder C");
- dump_reg(AUD_TCA_INFOFR, "Audio Widget Data Island Packet - Transcoder A");
- dump_reg(AUD_TCB_INFOFR, "Audio Widget Data Island Packet - Transcoder B");
- dump_reg(AUD_TCC_INFOFR, "Audio Widget Data Island Packet - Transcoder C");
- dump_reg(AUD_PIPE_CONV_CFG, "Audio Pipe and Converter Configs");
- dump_reg(AUD_C1_DIG_CNVT, "Audio Digital Converter - Converter 1");
- dump_reg(AUD_C2_DIG_CNVT, "Audio Digital Converter - Converter 2");
- dump_reg(AUD_C3_DIG_CNVT, "Audio Digital Converter - Converter 3");
- dump_reg(AUD_C1_STR_DESC, "Audio Stream Descriptor Format - Converter 1");
- dump_reg(AUD_C2_STR_DESC, "Audio Stream Descriptor Format - Converter 2");
- dump_reg(AUD_C3_STR_DESC, "Audio Stream Descriptor Format - Converter 3");
- dump_reg(AUD_OUT_CHAN_MAP, "Audio Output Channel Mapping");
- dump_reg(AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder A");
- dump_reg(AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder B");
- dump_reg(AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder C");
- dump_reg(AUD_PIPE_CONN_SEL_CTRL, "Audio Pipe Connection Select Control");
- dump_reg(AUD_TCA_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder A");
- dump_reg(AUD_TCB_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder B");
- dump_reg(AUD_TCC_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder C");
- dump_reg(AUD_PIN_ELD_CP_VLD, "Audio pin ELD valid and CP ready status");
- dump_reg(AUD_HDMI_FIFO_STATUS, "Audio HDMI FIFO Status");
+ dump_aud_reg(AUD_TCA_CONFIG, "Audio Configuration - Transcoder A");
+ dump_aud_reg(AUD_TCB_CONFIG, "Audio Configuration - Transcoder B");
+ dump_aud_reg(AUD_TCC_CONFIG, "Audio Configuration - Transcoder C");
+ dump_aud_reg(AUD_C1_MISC_CTRL, "Audio Converter 1 MISC Control");
+ dump_aud_reg(AUD_C2_MISC_CTRL, "Audio Converter 2 MISC Control");
+ dump_aud_reg(AUD_C3_MISC_CTRL, "Audio Converter 3 MISC Control");
+ dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID");
+ dump_aud_reg(AUD_RID, "Audio Revision ID");
+ dump_aud_reg(AUD_TCA_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder A");
+ dump_aud_reg(AUD_TCB_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder B");
+ dump_aud_reg(AUD_TCC_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder C");
+ dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)");
+ dump_aud_reg(AUD_TCA_EDID_DATA, "Audio EDID Data Block - Transcoder A");
+ dump_aud_reg(AUD_TCB_EDID_DATA, "Audio EDID Data Block - Transcoder B");
+ dump_aud_reg(AUD_TCC_EDID_DATA, "Audio EDID Data Block - Transcoder C");
+ dump_aud_reg(AUD_TCA_INFOFR, "Audio Widget Data Island Packet - Transcoder A");
+ dump_aud_reg(AUD_TCB_INFOFR, "Audio Widget Data Island Packet - Transcoder B");
+ dump_aud_reg(AUD_TCC_INFOFR, "Audio Widget Data Island Packet - Transcoder C");
+ dump_aud_reg(AUD_PIPE_CONV_CFG, "Audio Pipe and Converter Configs");
+ dump_aud_reg(AUD_C1_DIG_CNVT, "Audio Digital Converter - Converter 1");
+ dump_aud_reg(AUD_C2_DIG_CNVT, "Audio Digital Converter - Converter 2");
+ dump_aud_reg(AUD_C3_DIG_CNVT, "Audio Digital Converter - Converter 3");
+ dump_aud_reg(AUD_C1_STR_DESC, "Audio Stream Descriptor Format - Converter 1");
+ dump_aud_reg(AUD_C2_STR_DESC, "Audio Stream Descriptor Format - Converter 2");
+ dump_aud_reg(AUD_C3_STR_DESC, "Audio Stream Descriptor Format - Converter 3");
+ dump_aud_reg(AUD_OUT_CHAN_MAP, "Audio Output Channel Mapping");
+ dump_aud_reg(AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder A");
+ dump_aud_reg(AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder B");
+ dump_aud_reg(AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder C");
+ dump_aud_reg(AUD_PIPE_CONN_SEL_CTRL, "Audio Pipe Connection Select Control");
+ dump_aud_reg(AUD_TCA_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder A");
+ dump_aud_reg(AUD_TCB_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder B");
+ dump_aud_reg(AUD_TCC_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder C");
+ dump_aud_reg(AUD_PIN_ELD_CP_VLD, "Audio pin ELD valid and CP ready status");
+ dump_aud_reg(AUD_HDMI_FIFO_STATUS, "Audio HDMI FIFO Status");
/* Audio debug registers */
- dump_reg(AUD_ICOI, "Audio Immediate Command Output Interface");
- dump_reg(AUD_IRII, "Audio Immediate Response Input Interface");
- dump_reg(AUD_ICS, "Audio Immediate Command Status");
- dump_reg(AUD_CHICKENBIT_REG, "Audio Chicken Bit Register");
- dump_reg(AUD_DP_DIP_STATUS, "Audio DP and DIP FIFO Debug Status");
- dump_reg(AUD_TCA_M_CTS, "Audio M CTS Read Back Transcoder A");
- dump_reg(AUD_TCB_M_CTS, "Audio M CTS Read Back Transcoder B");
- dump_reg(AUD_TCC_M_CTS, "Audio M CTS Read Back Transcoder C");
+ dump_aud_reg(AUD_ICOI, "Audio Immediate Command Output Interface");
+ dump_aud_reg(AUD_IRII, "Audio Immediate Response Input Interface");
+ dump_aud_reg(AUD_ICS, "Audio Immediate Command Status");
+ dump_aud_reg(AUD_CHICKENBIT_REG, "Audio Chicken Bit Register");
+ dump_aud_reg(AUD_DP_DIP_STATUS, "Audio DP and DIP FIFO Debug Status");
+ dump_aud_reg(AUD_TCA_M_CTS, "Audio M CTS Read Back Transcoder A");
+ dump_aud_reg(AUD_TCB_M_CTS, "Audio M CTS Read Back Transcoder B");
+ dump_aud_reg(AUD_TCC_M_CTS, "Audio M CTS Read Back Transcoder C");
printf("\nDetails:\n\n");
@@ -2161,9 +2167,9 @@ static void dump_hsw_plus(void)
dump_ddi_func_ctl(PIPE_C);
/* audio configuration - details */
- dump_aud_transcoder_config(TRANSCODER_A);
- dump_aud_transcoder_config(TRANSCODER_B);
- dump_aud_transcoder_config(TRANSCODER_C);
+ dump_aud_config(TRANSCODER_A);
+ dump_aud_config(TRANSCODER_B);
+ dump_aud_config(TRANSCODER_C);
dump_aud_misc_control(CONVERTER_1);
dump_aud_misc_control(CONVERTER_2);
@@ -2208,21 +2214,20 @@ static void dump_hsw_plus(void)
dump_aud_dip_eld_ctrl_st(TRANSCODER_C);
dump_aud_eld_cp_vld();
- dump_hdmi_fifo_status();
-
- printf("\nDetails:\n\n");
+ dump_aud_hdmi_fifo_status();
+ dword = read_aud_reg(AUD_ICS);
printf("IRV [%1lx] %s\t", BIT(dword, 1),
OPNAME(immed_result_valid, BIT(dword, 1)));
printf("ICB [%1lx] %s\n", BIT(dword, 1),
OPNAME(immed_cmd_busy, BIT(dword, 0)));
- dword = INREG(AUD_CHICKENBIT_REG);
+ dword = read_aud_reg(AUD_CHICKENBIT_REG);
printf("AUD_CHICKENBIT_REG Audio Chicken Bits: %08x\n", dword);
if (IS_BROADWELL(devid))
parse_bdw_audio_chicken_bit_reg(dword);
- dword = INREG(AUD_DP_DIP_STATUS);
+ dword = read_aud_reg(AUD_DP_DIP_STATUS);
printf("AUD_DP_DIP_STATUS Audio DP & DIP FIFO Status: %08x\n\t", dword);
for (i = 31; i >= 0; i--)
if (BIT(dword, i))
--
1.8.1.2
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