[Intel-gfx] [PATCH] drm/i915/bdw: Fix 4g GGTT insert entries regression
Ben Widawsky
benjamin.widawsky at intel.com
Wed Mar 5 06:23:19 CET 2014
The PDE needs to wrap after writing all the PTEs. Quite a small/silly
bug to find in the massive change. It was introduced:
commit 307dc4f99f6d3a74a78b0e776838f35b2004f14d
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date: Thu Feb 20 11:51:21 2014 -0800
drm/i915/bdw: Reorganize PT allocations
I can't actually test this patch at the moment because my Broadwell is
unresponsive. This should be squashed if possible.
Cc: Imre Deak <imre.deak at intel.com>
Reported-by: Timo Aaltonen <tjaalton at ubuntu.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75763
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5462037..2bde703 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -335,7 +335,7 @@ static void gen8_ppgtt_insert_entries(struct i915_address_space *vm,
if (++pte == GEN8_PTES_PER_PAGE) {
kunmap_atomic(pt_vaddr);
pt_vaddr = NULL;
- if (pde + 1 == GEN8_PDES_PER_PAGE) {
+ if (++pde == GEN8_PDES_PER_PAGE) {
pdpe++;
pde = 0;
}
--
1.9.0
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