[Intel-gfx] [PATCH 11/11] drm/i915: assert we're not runtime suspended when writing registers

Daniel Vetter daniel at ffwll.ch
Wed Mar 5 14:46:29 CET 2014


On Wed, Mar 05, 2014 at 02:44:18PM +0100, Daniel Vetter wrote:
> On Fri, Feb 28, 2014 at 05:16:12PM +0200, Imre Deak wrote:
> > On Fri, 2014-02-21 at 13:52 -0300, Paulo Zanoni wrote:
> > > From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > > 
> > > I could swear this was already happening in the current code...
> > > 
> > > Also, put the reads and writes in a generic place, so we don't forget
> > > it again when we add runtime PM support to new platforms.
> > > 
> > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > 
> > In subject: s/writing/reading/ . Otherwise:
> > Reviewed-by: Imre Deak <imre.deak at intel.com>
> > 
> > > ---
> > >  drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > > index c3a4d6f..acce5e8 100644
> > > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > > @@ -470,6 +470,7 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
> > >  #define REG_READ_HEADER(x) \
> > >  	unsigned long irqflags; \
> > >  	u##x val = 0; \
> > > +	assert_device_not_suspended(dev_priv); \
> > >  	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
> 
> Hm, shouldn't we do this in the generic part of the register r/w
> functions? Anyway, I've merged all patches in this series to dinq with the
> exception of the two I've complained about.

Argh, failure at reading diffs. Your patch Does The Right Thing ;-)

Sorry for the noise ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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