[Intel-gfx] [PATCH 2/2] drm/i915: Always set fifo count to zero in gen6_reset

[Mika Kuoppala]

There should not be a case where fifo count is other
than zero after a successful reset. Always set
count to zero, but be paranoid enough to warn.

v2: rebased

Suggested-by: Ben Widawsky <ben at bwidawsk.net>
Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 00320fd..79eaba8 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -988,9 +988,10 @@ static int gen6_do_reset(struct drm_device *dev)
 		dev_priv->uncore.funcs.force_wake_get(dev_priv, fw_engine);
 
 	if (IS_GEN6(dev) || IS_GEN7(dev))
-		dev_priv->uncore.fifo_count =
-			__raw_i915_read32(dev_priv, GTFIFOCTL) &
-			GT_FIFO_FREE_ENTRIES_MASK;
+		WARN_ON((__raw_i915_read32(dev_priv, GTFIFOCTL) &
+			 GT_FIFO_FREE_ENTRIES_MASK) != 0);
+
+	dev_priv->uncore.fifo_count = 0;
 
 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
 	return ret;
-- 
1.7.9.5