[Intel-gfx] [PATCH] drm/i915: Fix drain latency precision multipler for VLV

[Zhenyu Wang]

On 2014.03.05 18:51:48 +0200, Ville Syrjälä wrote:
> >  	entries = (clock / 1000) * pixel_size;
> >  	*plane_prec_mult = (entries > 256) ?
> 
> The threshold should also be reduced to 128 entries.
> 

hmm, I'll double check if this is really required or not.

> > -		DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_16;
> > +		DRAIN_LATENCY_PRECISION_64 : DRAIN_LATENCY_PRECISION_32;
> >  	*plane_dl = (64 * (*plane_prec_mult) * 4) / ((clock / 1000) *
> >  						     pixel_size);
>                                                     ^^^^^^^^^^^^^^^^^
> Maybe replace the divisor here w/ just 'entrie' since it's same thing.
> Makes it a bit easier to see the relationship between this and the way
> the precision is selected.
> 

yeah, but that might be another seperate patch besides the precision
multipler this one trys to fix.

Thanks for review this.

-- 
Open Source Technology Center, Intel ltd.

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