[Intel-gfx] [PATCH v2 14/21] drm/i915: factor out reset_vblank_counter

[Jesse Barnes]

On Tue,  4 Mar 2014 19:23:03 +0200
Imre Deak <imre.deak at intel.com> wrote:

> We need to do the same for other platforms in upcoming patches.
> 
> v2:
> - s/p/pipe (Ville)
> - Call the new helper with the vbl_lock already held. The part it
>   protects is short, so releasing it between pipes only makes proving
>   correctness more difficult.
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 78e8989..28fae53 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5249,11 +5249,18 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
>  	}
>  }
>  
> +static void reset_vblank_counter(struct drm_device *dev, enum pipe pipe)
> +{
> +	assert_spin_locked(&dev->vbl_lock);
> +
> +	dev->vblank[pipe].last = 0;
> +}
> +
>  static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
>  {
>  	struct drm_device *dev = dev_priv->dev;
> -	enum pipe p;
>  	unsigned long irqflags;
> +	enum pipe pipe;
>  
>  	/*
>  	 * After this, the registers on the pipes that are part of the power
> @@ -5263,9 +5270,9 @@ static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
>  	 * FIXME: Should we do this in general in drm_vblank_post_modeset?
>  	 */
>  	spin_lock_irqsave(&dev->vbl_lock, irqflags);
> -	for_each_pipe(p)
> -		if (p != PIPE_A)
> -			dev->vblank[p].last = 0;
> +	for_each_pipe(pipe)
> +		if (pipe != PIPE_A)
> +			reset_vblank_counter(dev, pipe);
>  	spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
>  }
>  

Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center