[Intel-gfx] [PATCH 1/3] uxa: Don't emit PIPE_CONTROLs in an empty batch.

[Kenneth Graunke]

The first call to BEGIN_BATCH or BEGIN_BATCH_BLT will set current_batch
to RENDER_BATCH or BLT_BATCH.  If it's zero, that means the batch is
empty, so there's no point in flushing.

Previously, we would just go ahead and do a RENDER_RING flush, though
more by accident than intentional design.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/uxa/intel_batchbuffer.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/uxa/intel_batchbuffer.c b/src/uxa/intel_batchbuffer.c
index 579a63a..ca1af0d 100644
--- a/src/uxa/intel_batchbuffer.c
+++ b/src/uxa/intel_batchbuffer.c
@@ -184,6 +184,10 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn)
 
 	assert (!intel->in_batch_atomic);
 
+	/* No point in flushing an empty batch. */
+	if (intel->current_batch == 0)
+		return;
+
 	/* Big hammer, look to the pipelined flushes in future. */
 	if ((INTEL_INFO(intel)->gen >= 060)) {
 		if (intel->current_batch == BLT_BATCH) {
-- 
1.8.4.2