[Intel-gfx] [PATCH 3/3] uxa: Enable BLT acceleration on Broadwell.

[Kenneth Graunke]

This supports solid, copy, put_image, and get_image acceleration via the
BLT engine.  RENDER acceleration (composite) would be piles of work,
which is not worth doing since SNA exists, and Glamor is coming.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/uxa/intel_batchbuffer.h |  8 +++++++-
 src/uxa/intel_driver.c      |  7 ++-----
 src/uxa/intel_uxa.c         | 12 +++++++-----
 3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/src/uxa/intel_batchbuffer.h b/src/uxa/intel_batchbuffer.h
index b2bb390..79e2ab0 100644
--- a/src/uxa/intel_batchbuffer.h
+++ b/src/uxa/intel_batchbuffer.h
@@ -108,6 +108,8 @@ intel_batch_emit_reloc(intel_screen_private *intel,
 		       uint32_t read_domains,
 		       uint32_t write_domains, uint32_t delta, int needs_fence)
 {
+	uint64_t offset;
+
 	if (needs_fence)
 		drm_intel_bo_emit_reloc_fence(intel->batch_bo,
 					      intel->batch_used * 4,
@@ -118,7 +120,11 @@ intel_batch_emit_reloc(intel_screen_private *intel,
 					bo, delta,
 					read_domains, write_domains);
 
-	intel_batch_emit_dword(intel, bo->offset + delta);
+	offset = bo->offset64 + delta;
+
+	intel_batch_emit_dword(intel, offset);
+	if (INTEL_INFO(intel)->gen >= 0100)
+		intel_batch_emit_dword(intel, offset >> 32);
 }
 
 static inline void
diff --git a/src/uxa/intel_driver.c b/src/uxa/intel_driver.c
index 46e06df..7ea3b63 100644
--- a/src/uxa/intel_driver.c
+++ b/src/uxa/intel_driver.c
@@ -405,9 +405,6 @@ static Bool can_accelerate_blt(struct intel_screen_private *intel)
 	if (INTEL_INFO(intel)->gen == -1)
 		return FALSE;
 
-	if (INTEL_INFO(intel)->gen >= 0100)
-		return FALSE;
-
 	if (xf86ReturnOptValBool(intel->Options, OPTION_ACCEL_DISABLE, FALSE) ||
 	    !intel_option_cast_string_to_bool(intel, OPTION_ACCEL_METHOD, TRUE)) {
 		xf86DrvMsg(intel->scrn->scrnIndex, X_CONFIG,
@@ -938,7 +935,7 @@ I830ScreenInit(SCREEN_INIT_ARGS_DECL)
 
 	intel_batch_init(scrn);
 
-	if (INTEL_INFO(intel)->gen >= 040)
+	if (INTEL_INFO(intel)->gen >= 040 && INTEL_INFO(intel)->gen < 0100)
 		gen4_render_state_init(scrn);
 
 	miClearVisualTypes();
@@ -1193,7 +1190,7 @@ static Bool I830CloseScreen(CLOSE_SCREEN_ARGS_DECL)
 
 	intel_batch_teardown(scrn);
 
-	if (INTEL_INFO(intel)->gen >= 040)
+	if (INTEL_INFO(intel)->gen >= 040 && INTEL_INFO(intel)->gen < 0100)
 		gen4_render_state_cleanup(scrn);
 
 	xf86_cursors_fini(screen);
diff --git a/src/uxa/intel_uxa.c b/src/uxa/intel_uxa.c
index e46e15b..f4b8d2a 100644
--- a/src/uxa/intel_uxa.c
+++ b/src/uxa/intel_uxa.c
@@ -324,9 +324,10 @@ static void intel_uxa_solid(PixmapPtr pixmap, int x1, int y1, int x2, int y2)
 	pitch = intel_pixmap_pitch(pixmap);
 
 	{
-		BEGIN_BATCH_BLT(6);
+		int len = INTEL_INFO(intel)->gen >= 0100 ? 7 : 6;
+		BEGIN_BATCH_BLT(len);
 
-		cmd = XY_COLOR_BLT_CMD | (6 - 2);
+		cmd = XY_COLOR_BLT_CMD | (len - 2);
 
 		if (pixmap->drawable.bitsPerPixel == 32)
 			cmd |=
@@ -462,9 +463,10 @@ intel_uxa_copy(PixmapPtr dest, int src_x1, int src_y1, int dst_x1,
 	src_pitch = intel_pixmap_pitch(intel->render_source);
 
 	{
-		BEGIN_BATCH_BLT(8);
+		int len = INTEL_INFO(intel)->gen >= 0100 ? 10 : 8;
+		BEGIN_BATCH_BLT(len);
 
-		cmd = XY_SRC_COPY_BLT_CMD | (8 - 2);
+		cmd = XY_SRC_COPY_BLT_CMD | (len - 2);
 
 		if (dest->drawable.bitsPerPixel == 32)
 			cmd |=
@@ -1353,7 +1355,7 @@ Bool intel_uxa_init(ScreenPtr screen)
 	intel->uxa_driver->done_copy = intel_uxa_done;
 
 	/* Composite */
-	if (intel_option_accel_blt(intel)) {
+	if (intel_option_accel_blt(intel) || INTEL_INFO(intel)->gen >= 0100) {
 	} else if (IS_GEN2(intel)) {
 		intel->uxa_driver->check_composite = i830_check_composite;
 		intel->uxa_driver->check_composite_target = i830_check_composite_target;
-- 
1.8.4.2