[Intel-gfx] [PATCH 18/24] drm/i915: Wait for watermark updates to finish before disabling a pipe

ville.syrjala at linux.intel.com ville.syrjala at linux.intel.com
Fri Mar 7 17:32:25 CET 2014


From: Ville Syrjälä <ville.syrjala at linux.intel.com>

After we've disabled the planes, it seems like a good idea wait for
the vblank driven watermark updates to finish before we turn off the
vblank interrupts and eventually the entire pipe.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/intel_display.c |  2 ++
 drivers/gpu/drm/i915/intel_drv.h     |  1 +
 drivers/gpu/drm/i915/intel_pm.c      | 33 +++++++++++++++++++++++++++++++++
 4 files changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b625601..39bcf3b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1618,6 +1618,7 @@ typedef struct drm_i915_private {
 		struct mutex mutex;
 
 		struct work_struct work;
+		wait_queue_head_t wait;
 	} wm;
 
 	struct i915_package_c8 pc8;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8d16ada7..29f9d33 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3617,6 +3617,8 @@ static void ilk_crtc_disable_planes(struct drm_crtc *crtc)
 	intel_disable_primary_plane(dev_priv, plane, pipe);
 	intel_wait_for_vblank(dev, pipe);
 
+	ilk_wm_synchronize(crtc);
+
 	drm_vblank_off(dev, pipe);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index c654a89..4d8f646 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -951,6 +951,7 @@ void intel_init_runtime_pm(struct drm_i915_private *dev_priv);
 void intel_fini_runtime_pm(struct drm_i915_private *dev_priv);
 void ilk_wm_get_hw_state(struct drm_device *dev);
 void ilk_update_pipe_wm(struct drm_device *dev, enum pipe pipe);
+void ilk_wm_synchronize(struct drm_crtc *crtc);
 
 
 /* intel_sdvo.c */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 38fbd9a..a76fa82 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2761,6 +2761,7 @@ static bool ilk_pending_watermarks_ready(struct intel_crtc *intel_crtc)
 
 static bool ilk_refresh_pending_watermarks(struct drm_device *dev)
 {
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc;
 	bool changed = false;
 
@@ -2782,6 +2783,9 @@ static bool ilk_refresh_pending_watermarks(struct drm_device *dev)
 		changed = true;
 	}
 
+	if (changed)
+		wake_up_all(&dev_priv->wm.wait);
+
 	return changed;
 }
 
@@ -2979,6 +2983,34 @@ static void ilk_wm_cancel(struct intel_crtc *intel_crtc)
 	}
 }
 
+void ilk_wm_synchronize(struct drm_crtc *crtc)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	enum pipe pipe = intel_crtc->pipe;
+	unsigned long timeout = msecs_to_jiffies(100);
+
+	wait_event_timeout(dev_priv->wm.wait, !intel_crtc->wm.dirty, timeout);
+
+	mutex_lock(&dev_priv->wm.mutex);
+
+	spin_lock_irq(&intel_crtc->wm.lock);
+
+	WARN(intel_crtc->wm.dirty, "pipe %c watermark updates failed to complete\n",
+	     pipe_name(pipe));
+
+	/* clean up if something is left behind */
+	ilk_wm_cancel(intel_crtc);
+
+	spin_unlock_irq(&intel_crtc->wm.lock);
+
+	/* pending update (if any) got cancelled */
+	intel_crtc->wm.pending = intel_crtc->wm.active;
+
+	mutex_unlock(&dev_priv->wm.mutex);
+}
+
 static int ilk_update_primary_wm(struct drm_crtc *crtc,
 				 struct intel_crtc_wm_config *config)
 {
@@ -6130,6 +6162,7 @@ void intel_init_pm(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
 	mutex_init(&dev_priv->wm.mutex);
+	init_waitqueue_head(&dev_priv->wm.wait);
 	INIT_WORK(&dev_priv->wm.work, ilk_watermark_work);
 
 	if (HAS_FBC(dev)) {
-- 
1.8.3.2




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