[Intel-gfx] [PATCH] drm/i915: Fail gpu reset if the forcewake fifo hasn't drained

[Daniel Vetter]

Since the gpu reset + full ppgtt merge we have a hard hang on snb when
running the gem_reset_stat tests. Recently Mika also some more strict
forcewake fifo warnigns for gen6/7 in

commit 20277c60ed08ab4f7237854cc6c2046649f9200f
Author: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Date:   Wed Mar 5 18:08:19 2014 +0200

    drm/i915: Always set fifo count to zero in gen6_reset

and they _do_ fire just right before the the final failing reset which
then results in the machine's ultimate demise.

So use this indicator to fail the gpu reset with an -EIO code,
preventing further command submission, further hangs and so the deadly
final gpu reset attempt. It seems to work and my snb survives now.

The gpu is still dead though unfortunately.

Cc: Mika Kuoppala <mika.kuoppala at intel.com>
References: https://bugs.freedesktop.org/show_bug.cgi?id=74100
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/intel_uncore.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index c666af8232ef..9e22b11d0b0c 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -989,9 +989,11 @@ static int gen6_do_reset(struct drm_device *dev)
 	if (fw_engine)
 		dev_priv->uncore.funcs.force_wake_get(dev_priv, fw_engine);
 
-	if (IS_GEN6(dev) || IS_GEN7(dev))
-		WARN_ON((__raw_i915_read32(dev_priv, GTFIFOCTL) &
-			 GT_FIFO_FREE_ENTRIES_MASK) != 0);
+	if (IS_GEN6(dev) || IS_GEN7(dev)) {
+		if (WARN_ON((__raw_i915_read32(dev_priv, GTFIFOCTL) &
+			     GT_FIFO_FREE_ENTRIES_MASK) != 0))
+		    ret = -EIO;
+	}
 
 	dev_priv->uncore.fifo_count = 0;
 
-- 
1.8.1.4