[Intel-gfx] [PATCH 2/2] drm/i915: Do not force non-caching copies for pwrite along shmem path

[Daniel Vetter]

On Fri, Mar 07, 2014 at 10:14:58AM -0800, Volkin, Bradley D wrote:
> Reviewed-by: Brad Volkin <bradley.d.volkin at intel.com>
> 
> On Fri, Mar 07, 2014 at 12:30:37AM -0800, Chris Wilson wrote:
> > We don't always want to write into main memory with pwrite. The shmem
> > fast path in particular is used for memory that is cacheable - under
> > such circumstances forcing the cache eviction is undesirable. As we will
> > always flush the cache when targeting incoherent buffers, we can rely on
> > that second pass to apply the cache coherency rules and so benefit from
> > in-cache copies otherwise.
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Both patches merged, thanks.
-Daniel

> > ---
> >  drivers/gpu/drm/i915/i915_gem.c | 5 ++---
> >  1 file changed, 2 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index 877afb2c576d..e0ca6d6be2ae 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -810,9 +810,8 @@ shmem_pwrite_fast(struct page *page, int shmem_page_offset, int page_length,
> >  	if (needs_clflush_before)
> >  		drm_clflush_virt_range(vaddr + shmem_page_offset,
> >  				       page_length);
> > -	ret = __copy_from_user_inatomic_nocache(vaddr + shmem_page_offset,
> > -						user_data,
> > -						page_length);
> > +	ret = __copy_from_user_inatomic(vaddr + shmem_page_offset,
> > +					user_data, page_length);
> >  	if (needs_clflush_after)
> >  		drm_clflush_virt_range(vaddr + shmem_page_offset,
> >  				       page_length);
> > -- 
> > 1.9.0
> > 
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> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch