[Intel-gfx] [PATCH 1/2] drm/i915/bdw: Use scratch page table for GEN8 PPGTT

[Ben Widawsky]

On Tue, Mar 11, 2014 at 5:24 AM, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Sat, Mar 08, 2014 at 11:59:42AM -0800, Ben Widawsky wrote:
>> On Sat, Mar 08, 2014 at 11:58:16AM -0800, Ben Widawsky wrote:
>> > I'm not clear if the hardware is still subject to the same prefetching
>> > issues that made us use a scratch page in the first place. In either
>> > case, we're using garbage with the current code (we will end up using
>> > offset 0).
>> >
>> > This may be the cause of our current gem_cpu_reloc regression with
>> > PPGTT. I cannot test it at the moment.
>> >
>>
>> Wait NVM... that wasn't gen8. I can't associate this one with a bug.
>
> Yeah, this doesn't appear to achieve anything. ppgtt->base.scratch is
> only used by ppgtt->base.clear_range() and there is no caller between
> i915_gem_init_ppgtt() and ppgtt->base.scratch initialisation in
> gen6_ppgtt_init().


Still the right thing to do for gen8 though, right?