[Intel-gfx] [PATCH 2/2] drm/i915: Correct PPGTT total size

[Daniel Vetter]

On Tue, Mar 11, 2014 at 12:21:12PM +0000, Chris Wilson wrote:
> On Sat, Mar 08, 2014 at 11:58:17AM -0800, Ben Widawsky wrote:
> > Our code allows have a PPGTT that is smaller than the maximum size for
> > GEN6-GEN7. Though I don't think this actually ever occurs, the code may
> > as well work properly and more importantly look correct by using the
> > variable size instead of the HW max.
> 
> Might mention that the num_pd_entries is set during allocation of the
> page directories, and so here we just compute the size for the drm_mm
> range manager (and the variables only exist for consistency with legacy
> GGTT interfaces).
>  
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Both merged, thanks for patches&review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch