[Intel-gfx] [RFC] Remove cause of 'primary plane already enabled' kernel warning

joao.santos at intel.com joao.santos at intel.com
Wed Mar 12 16:55:10 CET 2014


From: Joao Santos <joao.santos at intel.com>

Remove code which is trigerring a kernel warning. The kernel sets the
primary_enable flag prior to calling intel_enable_primary_plane() which also
sets it. This causes the WARN to assert everytime.

------------[ cut here ]------------
[    5.458511] WARNING: at i915/intel_display.c:2004 intel_enable_primary_plane+0xd8/0xe0()
[    5.458511] Primary plane already enabled
[    5.458513] Modules linked in:
[    5.458516] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.20-263878-g086400b #10
[    5.458517] Hardware name: Intel Corporation Shark Bay Client platform/WhiteTip Mountain 1, BIOS HSWLPTU1.86C.0119.R00.1303230105 03/23/2013
[    5.458521]  ffffffff81d0dbc8 ffff8801488c3378 ffffffff8189d7a4 ffff8801488c33b8
[    5.458523]  ffffffff8105bc60 ffff8801488c33e8 ffff880147118000 0000000000000000
[    5.458525]  0000000000000000 ffff8801478bc000 ffff880147118000 ffff8801488c3418

This patch changes the code to call only intel_enable_primary_plane().

Change-Id: I0fa323e5f5ac330f88a78e7cb2f5ceefeff7d4fd
Signed-off-by: Joao Santos <joao.santos at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ae9b5a1..8953b7c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3950,7 +3950,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
 	 */
 	intel_crtc_load_lut(crtc);
 
-	intel_crtc->primary_enabled = true;
 	intel_update_watermarks(crtc);
 	intel_enable_pipe(dev_priv, pipe,
 			  intel_crtc->config.has_pch_encoder, false);
@@ -4097,7 +4096,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
 	intel_ddi_set_pipe_settings(crtc);
 	intel_ddi_enable_transcoder_func(crtc);
 
-	intel_crtc->primary_enabled = true;
 	intel_update_watermarks(crtc);
 	intel_enable_pipe(dev_priv, pipe,
 			  intel_crtc->config.has_pch_encoder, false);
@@ -4544,7 +4542,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
 
 	intel_crtc_load_lut(crtc);
 
-	intel_crtc->primary_enabled = true;
 	intel_update_watermarks(crtc);
 	intel_enable_pipe(dev_priv, pipe, false, is_dsi);
 	intel_enable_primary_plane(dev_priv, plane, pipe);
@@ -4583,7 +4580,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
 
 	intel_crtc_load_lut(crtc);
 
-	intel_crtc->primary_enabled = true;
 	intel_enable_pipe(dev_priv, pipe, false, false);
 	intel_enable_primary_plane(dev_priv, plane, pipe);
 	intel_enable_planes(crtc);
-- 
1.9.0




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