[Intel-gfx] [PATCH] drm/i915/bdw: The TLB invalidation mechanism has been removed from INSTPM

[Ben Widawsky]

On Thu, Mar 13, 2014 at 12:51 AM, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> Upon resume, the hardware continues writing the breadcrumbs into the old
> hws page (due to the stale TLB) and we try to read the seqno from the
> new page, so as shown by the error-states it appears that the breadcrumb
> writes are not happening. Since the hardware is writing to a random address,
> we are now corrupting random memory.
>
> Which is what I thought I said in the changelog.

Yes, you did say that. However, we should be idling on freeze, so the
explanation
I was missing is how or why the HW is continuing to use the old status page even
though we've had to do a TLB flush when we emit the next batch.