[Intel-gfx] [PATCH] drm/i915/bdw: Fix GEN8 GTT size calculation

Woodhouse, David david.woodhouse at intel.com
Fri Mar 14 23:05:19 CET 2014


On Fri, 2014-03-14 at 12:14 -0700, Ben Widawsky wrote:
> 
> This was based off of linus master, since I assumed that is what David
> was using.

Indeed. Now it's much better. Now that nasty scary warning is gone away
and now I just have a few hundred of these (from your other patch before
which it crashed instead):
[    6.167463] [drm:intel_set_cpu_fifo_underrun_reporting] *ERROR* Interrupt arrived before CRTCs were setup up
... 
[   35.443214] [drm:intel_set_cpu_fifo_underrun_reporting] *ERROR* Interrupt arrived before CRTCs were setup up

... followed by these until I turn it off:
[   38.190001] dmar: DMAR:[DMA Read] Request device [00:02.0] fault addr ade47000 
[   38.190001] DMAR:[fault reason 06] PTE Read access is not set
[   38.204801] dmar: DMAR:[DMA Read] Request device [00:02.0] fault addr add5e000 
[   38.204801] DMAR:[fault reason 06] PTE Read access is not set
[   38.219598] dmar: DMAR:[DMA Read] Request device [00:02.0] fault addr adc75000 
[   38.219598] DMAR:[fault reason 06] PTE Read access is not set

As I noted in private though, there's an RMRR instructing us to set up a
1:1 mapping for the entire ad000000-af7fffff range. An instruction which
we appear to be following. So I have no idea why we're taking faults for
those addresses; that might be a problem in IOMMU code. Will look into
that further...


-- 
David Woodhouse                            Open Source Technology Centre
David.Woodhouse at intel.com                              Intel Corporation
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