[Intel-gfx] [PATCH 09/12] drm/i915/bdw: RPS frequency bits are the same as HSW

[Ben Widawsky]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 drivers/gpu/drm/i915/intel_pm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ab9e992..9486396 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3028,7 +3028,7 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
 
 	gen6_set_rps_thresholds(dev_priv, val);
 
-	if (IS_HASWELL(dev))
+	if (IS_HASWELL(dev) || IS_BROADWELL(dev))
 		I915_WRITE(GEN6_RPNSWREQ,
 			   HSW_FREQUENCY(val));
 	else
-- 
1.9.0