[Intel-gfx] [PATCH] rendercopy/gen8: Remove a hole in struct gen8_blend_state
Barbalho, Rafael
rafael.barbalho at intel.com
Wed Mar 26 19:45:11 CET 2014
> -----Original Message-----
> From: Lespiau, Damien
> Sent: Monday, March 24, 2014 11:54 AM
> To: intel-gfx at lists.freedesktop.org
> Cc: Widawsky, Benjamin; Barbalho, Rafael
> Subject: [PATCH] rendercopy/gen8: Remove a hole in struct
> gen8_blend_state
>
> Using uint64_t in that second member makes it aligned to 64bits, while the
> first member is only 32bits. We then had a 32bits hole in there!
>
This stopped my hangs but I still have failures in render copy. If I let android boot up to the home screen and stop everything rendercopy works. I haven't managed to debug the state of the pipeline yet.
Thanks,
Raf
> Found-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Ben Widawsky <benjamin.widawsky at intel.com>
> Cc: Rafael Barbalho <rafael.barbalho at intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> ---
> lib/gen8_render.h | 38 +++++++++++++++++++-------------------
> 1 file changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/lib/gen8_render.h b/lib/gen8_render.h index ca53d64..fffc100
> 100644
> --- a/lib/gen8_render.h
> +++ b/lib/gen8_render.h
> @@ -273,25 +273,25 @@ struct gen8_blend_state {
> } bs0;
>
> struct {
> - uint64_t write_disable_blue:1;
> - uint64_t write_disable_green:1;
> - uint64_t write_disable_red:1;
> - uint64_t write_disable_alpha:1;
> - uint64_t pad1:1;
> - uint64_t alpha_blend_func:3;
> - uint64_t dest_alpha_blend_factor:5;
> - uint64_t source_alpha_blend_factor:5;
> - uint64_t color_blend_func:3;
> - uint64_t dest_blend_factor:5;
> - uint64_t source_blend_factor:5;
> - uint64_t color_buffer_blend:1;
> - uint64_t post_blend_color_clamp:1;
> - uint64_t pre_blend_color_clamp:1;
> - uint64_t color_clamp_range:2;
> - uint64_t pre_blend_source_only_clamp:1;
> - uint64_t pad0:22;
> - uint64_t logic_op_func:4;
> - uint64_t logic_op_enable:1;
> + uint32_t write_disable_blue:1;
> + uint32_t write_disable_green:1;
> + uint32_t write_disable_red:1;
> + uint32_t write_disable_alpha:1;
> + uint32_t pad1:1;
> + uint32_t alpha_blend_func:3;
> + uint32_t dest_alpha_blend_factor:5;
> + uint32_t source_alpha_blend_factor:5;
> + uint32_t color_blend_func:3;
> + uint32_t dest_blend_factor:5;
> + uint32_t source_blend_factor:5;
> + uint32_t color_buffer_blend:1;
> + uint32_t post_blend_color_clamp:1;
> + uint32_t pre_blend_color_clamp:1;
> + uint32_t color_clamp_range:2;
> + uint32_t pre_blend_source_only_clamp:1;
> + uint32_t pad0:22;
> + uint32_t logic_op_func:4;
> + uint32_t logic_op_enable:1;
> } bs[16];
> };
>
> --
> 1.8.3.1
More information about the Intel-gfx
mailing list