[Intel-gfx] [PATCH 02/49] drm/i915: s/for_each_ring/for_each_active_ring
oscar.mateo at intel.com
oscar.mateo at intel.com
Thu Mar 27 18:59:31 CET 2014
From: Ben Widawsky <benjamin.widawsky at intel.com>
The name "active" was recommended by Chris.
With the ordering change of how we initialize things, it is desirable to
be able to address each ring, whether initialized or not.
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
v2: Several rebases.
Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++++------
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 14 +++++++-------
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 10 +++++-----
drivers/gpu/drm/i915/i915_irq.c | 8 ++++----
drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
8 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 049dcb5..f423eb6 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -571,7 +571,7 @@ static int i915_gem_request_info(struct seq_file *m, void *data)
return ret;
count = 0;
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
if (list_empty(&ring->request_list))
continue;
@@ -615,7 +615,7 @@ static int i915_gem_seqno_info(struct seq_file *m, void *data)
return ret;
intel_runtime_pm_get(dev_priv);
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
i915_ring_seqno_info(m, ring);
intel_runtime_pm_put(dev_priv);
@@ -752,7 +752,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
seq_printf(m, "Graphics Interrupt mask: %08x\n",
I915_READ(GTIMR));
}
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
if (INTEL_INFO(dev)->gen >= 6) {
seq_printf(m,
"Graphics Interrupt mask (%s): %08x\n",
@@ -1677,7 +1677,7 @@ static int i915_context_status(struct seq_file *m, void *unused)
list_for_each_entry(ctx, &dev_priv->context_list, link) {
seq_puts(m, "HW context ");
describe_ctx(m, ctx);
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
if (ring->default_context == ctx)
seq_printf(m, "(default context %s) ", ring->name);
@@ -1809,7 +1809,7 @@ static void gen8_ppgtt_info(struct seq_file *m, struct drm_device *dev)
seq_printf(m, "Page directories: %d\n", ppgtt->num_pd_pages);
seq_printf(m, "Page tables: %d\n", ppgtt->num_pd_entries);
- for_each_ring(ring, dev_priv, unused) {
+ for_each_active_ring(ring, dev_priv, unused) {
seq_printf(m, "%s\n", ring->name);
for (i = 0; i < 4; i++) {
u32 offset = 0x270 + i * 8;
@@ -1832,7 +1832,7 @@ static void gen6_ppgtt_info(struct seq_file *m, struct drm_device *dev)
if (INTEL_INFO(dev)->gen == 6)
seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
seq_printf(m, "%s\n", ring->name);
if (INTEL_INFO(dev)->gen == 7)
seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 53196d0..57bf4a7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1470,7 +1470,7 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
}
/* Iterate over initialised rings */
-#define for_each_ring(ring__, dev_priv__, i__) \
+#define for_each_active_ring(ring__, dev_priv__, i__) \
for ((i__) = 0; (i__) < I915_NUM_RINGS; (i__)++) \
if (((ring__) = &(dev_priv__)->ring[(i__)]), intel_ring_initialized((ring__)))
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 33bbaa0..1d85dc9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2097,7 +2097,7 @@ i915_gem_init_seqno(struct drm_device *dev, u32 seqno)
int ret, i, j;
/* Carefully retire all requests without writing to the rings */
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
ret = intel_ring_idle(ring);
if (ret)
return ret;
@@ -2105,7 +2105,7 @@ i915_gem_init_seqno(struct drm_device *dev, u32 seqno)
i915_gem_retire_requests(dev);
/* Finally reset hw state */
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
intel_ring_init_seqno(ring, seqno);
for (j = 0; j < ARRAY_SIZE(ring->sync_seqno); j++)
@@ -2417,10 +2417,10 @@ void i915_gem_reset(struct drm_device *dev)
* them for finding the guilty party. As the requests only borrow
* their reference to the objects, the inspection must be done first.
*/
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
i915_gem_reset_ring_status(dev_priv, ring);
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
i915_gem_reset_ring_cleanup(dev_priv, ring);
i915_gem_cleanup_ringbuffer(dev);
@@ -2501,7 +2501,7 @@ i915_gem_retire_requests(struct drm_device *dev)
bool idle = true;
int i;
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
i915_gem_retire_requests_ring(ring);
idle &= list_empty(&ring->request_list);
}
@@ -2789,7 +2789,7 @@ int i915_gpu_idle(struct drm_device *dev)
int ret, i;
/* Flush everything onto the inactive list. */
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
ret = i915_switch_context(ring, NULL, ring->default_context);
if (ret)
return ret;
@@ -4492,7 +4492,7 @@ i915_gem_cleanup_ringbuffer(struct drm_device *dev)
struct intel_ring_buffer *ring;
int i;
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
intel_cleanup_ring_buffer(ring);
}
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 6043062..3cfdfbe 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -502,7 +502,7 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
BUG_ON(!dev_priv->ring[RCS].default_context);
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
ret = do_switch(ring, ring->default_context);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5774eb2..5ff0b20 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -806,7 +806,7 @@ static int gen8_ppgtt_enable(struct i915_hw_ppgtt *ppgtt)
struct intel_ring_buffer *ring;
int j, ret;
- for_each_ring(ring, dev_priv, j) {
+ for_each_active_ring(ring, dev_priv, j) {
I915_WRITE(RING_MODE_GEN7(ring),
_MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
@@ -823,7 +823,7 @@ static int gen8_ppgtt_enable(struct i915_hw_ppgtt *ppgtt)
return 0;
err_out:
- for_each_ring(ring, dev_priv, j)
+ for_each_active_ring(ring, dev_priv, j)
I915_WRITE(RING_MODE_GEN7(ring),
_MASKED_BIT_DISABLE(GFX_PPGTT_ENABLE));
return ret;
@@ -849,7 +849,7 @@ static int gen7_ppgtt_enable(struct i915_hw_ppgtt *ppgtt)
}
I915_WRITE(GAM_ECOCHK, ecochk);
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
int ret;
/* GFX_MODE is per-ring on gen7+ */
I915_WRITE(RING_MODE_GEN7(ring),
@@ -888,7 +888,7 @@ static int gen6_ppgtt_enable(struct i915_hw_ppgtt *ppgtt)
I915_WRITE(GFX_MODE, _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
int ret = ppgtt->switch_mm(ppgtt, ring, true);
if (ret)
return ret;
@@ -1246,7 +1246,7 @@ void i915_check_and_clear_faults(struct drm_device *dev)
if (INTEL_INFO(dev)->gen < 6)
return;
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
u32 fault_reg;
fault_reg = I915_READ(RING_FAULT_REG(ring));
if (fault_reg & RING_FAULT_VALID) {
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index bc36c8e..1fdec5f 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2114,7 +2114,7 @@ static void i915_error_wake_up(struct drm_i915_private *dev_priv,
*/
/* Wake up __wait_seqno, potentially holding dev->struct_mutex. */
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
wake_up_all(&ring->irq_queue);
/* Wake up intel_crtc_wait_for_pending_flips, holding crtc->mutex. */
@@ -2657,7 +2657,7 @@ static void semaphore_clear_deadlocks(struct drm_i915_private *dev_priv)
struct intel_ring_buffer *ring;
int i;
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
ring->hangcheck.deadlock = false;
}
@@ -2729,7 +2729,7 @@ static void i915_hangcheck_elapsed(unsigned long data)
if (!i915.enable_hangcheck)
return;
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
u32 seqno, acthd;
bool busy = true;
@@ -2807,7 +2807,7 @@ static void i915_hangcheck_elapsed(unsigned long data)
busy_count += busy;
}
- for_each_ring(ring, dev_priv, i) {
+ for_each_active_ring(ring, dev_priv, i) {
if (ring->hangcheck.score >= HANGCHECK_SCORE_RING_HUNG) {
DRM_INFO("%s on %s\n",
stuck[i] ? "stuck" : "no progress",
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fd68f93..c14a6ac 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3271,7 +3271,7 @@ static void gen8_enable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 40 << 16);
I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
- for_each_ring(ring, dev_priv, unused)
+ for_each_active_ring(ring, dev_priv, unused)
I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
I915_WRITE(GEN6_RC_SLEEP, 0);
I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
@@ -3379,7 +3379,7 @@ static void gen6_enable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000);
I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25);
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
I915_WRITE(GEN6_RC_SLEEP, 0);
@@ -3631,7 +3631,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000);
I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25);
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
I915_WRITE(GEN6_RC6_THRESHOLD, 0x557);
@@ -4273,7 +4273,7 @@ bool i915_gpu_busy(void)
goto out_unlock;
dev_priv = i915_mch_dev;
- for_each_ring(ring, dev_priv, i)
+ for_each_active_ring(ring, dev_priv, i)
ret |= !list_empty(&ring->request_list);
out_unlock:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 87d1a2d..489046a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -678,7 +678,7 @@ gen6_add_request(struct intel_ring_buffer *ring)
return ret;
if (i915_semaphore_is_enabled(dev)) {
- for_each_ring(useless, dev_priv, i) {
+ for_each_active_ring(useless, dev_priv, i) {
u32 mbox_reg = ring->signal_mbox[i];
if (mbox_reg != GEN6_NOSYNC)
update_mboxes(ring, mbox_reg);
--
1.9.0
More information about the Intel-gfx
mailing list