[Intel-gfx] [PATCH v2 3/3] drm/i915: Track OACONTROL register enable/disable during parsing

[Kenneth Graunke]

On 03/28/2014 10:21 AM, bradley.d.volkin at intel.com wrote:
> From: Brad Volkin <bradley.d.volkin at intel.com>
> 
> There is some thought that the data from the performance counters enabled
> via OACONTROL should only be available to the process that enabled counting.
> To limit snooping, require that any batch buffer which sets OACONTROL to a
> non-zero value also sets it back to 0 before the end of the batch.
> 
> This requires limiting OACONTROL writes to happen via MI_LOAD_REGISTER_IMM
> so that we can access the value being written. This should be in line with
> the expected use case for writing OACONTROL.
> 
> v2: Drop an unnecessary '? true : false'
> 
> Cc: Kenneth Graunke <kenneth at whitecape.org>
> Signed-off-by: Brad Volkin <bradley.d.volkin at intel.com>

I still don't see any rationale for prohibiting LRM - there's zero
security benefit, and you can write to every other register with either
LRI or LRM, so it's just extra inconsistency.  But, Daniel.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

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