[Intel-gfx] [PATCH] drm/i915/bdw: Only use 2g GGTT for 32b platforms

[Daniel Vetter]

On Tue, May 06, 2014 at 09:58:59PM -0700, Ben Widawsky wrote:
> From: Ben Widawsky <benjamin.widawsky at linux.intel.com>
> 
> Daniel requested in the bug that I use a 3GB fallback size. Since this
> is not in the spec as a valid size, I decided against it. We could
> potentially add a patch to bump it to 3GB on top of this one.
> 
> This probably should be CC: stable - but I'll let the powers that be
> decide that one.
> 
> v2: Change ifdef to 32b, instead of ifndef
> update comment
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76619
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 846b6ee..d03a540 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1759,6 +1759,14 @@ static inline unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)
>  	bdw_gmch_ctl &= BDW_GMCH_GGMS_MASK;
>  	if (bdw_gmch_ctl)
>  		bdw_gmch_ctl = 1 << bdw_gmch_ctl;
> +
> +#ifdef CONFIG_32BIT
> +	/* Limit 32B platforms to a 2GB GGTT
> +	4 << 20 / pte size * PAGE_SIZE */
> +	if (bdw_gmch_ctl > 4)
> +		bdw_gmch_ctl = 4;

Comment needs CodingStyle polish and we might as well return the right
value directly instead of adjusting bdw_gmch_ctl. With that polish applied
this is Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>o

And yes most definitely Cc: stable at vger.kernel.org since it's a
regression.

Aside: Please add the regression tags when handling bugs, I need those for
tracking and stats.
-Daniel

> +#endif
> +
>  	return bdw_gmch_ctl << 20;
>  }
>  
> -- 
> 1.9.2
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch