[Intel-gfx] [PATCH 9/9] drm/i915: Split out aliasing binds

Daniel Vetter daniel at ffwll.ch
Wed May 7 09:59:03 CEST 2014


On Tue, May 06, 2014 at 10:21:38PM -0700, Ben Widawsky wrote:
> This patch finishes off  actually separating the aliasing and global
> finds. Prior to this, all global binds would be aliased. Now if aliasing
> binds are required, they must be explicitly asked for. So far, we have
> no users of this outside of execbuf - but Mika has already submitted a
> patch requiring just this.
> 
> A nice benefit of this is we should no longer be able to clobber GTT
> only objects from the aliasing PPGTT.
> 
> TEST=gem_storedw_batches_loop

Hm, how does this testcase test this bug? I'm surprised ...

Also the usual format is

Testcase: igt/gem_stored_batches_loop

i.e. the testcase name as used by piglit.

Anyway I want these last two patches from this series since they fix up a
regression introduced by full ppgtt. Which is blocking the cmd parser work
(among other stuff). But I'm not sold on the earlier parts, so can you
please rebase just these two?

Also we need to triple-check that we have testcases for all the rebind and
set_cache_level corner-case fun in igt.
-Daniel

> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_drv.h            | 2 +-
>  drivers/gpu/drm/i915/i915_gem.c            | 6 ++++--
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
>  drivers/gpu/drm/i915/i915_gem_gtt.c        | 3 +++
>  4 files changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 413b114..ba897f0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2316,7 +2316,7 @@ i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj,
>  		      uint32_t alignment,
>  		      unsigned flags)
>  {
> -	return i915_gem_object_pin(obj, obj_to_ggtt(obj), alignment, flags | PIN_GLOBAL_ALIASED);
> +	return i915_gem_object_pin(obj, obj_to_ggtt(obj), alignment, flags | PIN_GLOBAL);
>  }
>  
>  static inline int
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 86cec5c..b2056f3 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3346,8 +3346,10 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
>  
>  	WARN_ON(flags & PIN_MAPPABLE && !obj->map_and_fenceable);
>  
> -	if (flags & PIN_GLOBAL_ALIASED)
> -		vma_bind_flags = GLOBAL_BIND | ALIASING_BIND;
> +	if (flags & PIN_ALIASING)
> +		vma_bind_flags = ALIASING_BIND;
> +	if (flags & PIN_GLOBAL)
> +		vma_bind_flags = GLOBAL_BIND;
>  
>  	i915_gem_vma_bind(vma, obj->cache_level, vma_bind_flags);
>  
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index bcb3ae8..60049b4 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -549,7 +549,7 @@ i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
>  	unsigned flags;
>  	int ret;
>  
> -	flags = 0;
> +	flags = PIN_ALIASING;
>  
>  	need_fence =
>  		has_fenced_gpu_access &&
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 3f2f84e..846b6ee 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1569,6 +1569,9 @@ static void ggtt_bind_vma(struct i915_vma *vma,
>  		}
>  	}
>  
> +	if (!(flags & ALIASING_BIND))
> +		return;
> +
>  	if (dev_priv->mm.aliasing_ppgtt &&
>  	    (!obj->has_aliasing_ppgtt_mapping ||
>  	     (cache_level != obj->cache_level))) {
> -- 
> 1.9.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



More information about the Intel-gfx mailing list