[Intel-gfx] [PATCH 11/71] drm/i915/chv: Add Cherryview interrupt registers into debugfs

[Jani Nikula]

On Wed, 09 Apr 2014, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Make i915_gem_interrupt debugfs file functional on CHV.
>
> FIXME: Extract helpers for gt/display blocks to shrink the function a
> bit and avoid duplication between bdw/chv (and other similar cases for
> upstream).

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 42 ++++++++++++++++++++++++++++++++++++-
>  1 file changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 506177a..1efb885 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -638,7 +638,47 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
>  		return ret;
>  	intel_runtime_pm_get(dev_priv);
>  
> -	if (INTEL_INFO(dev)->gen >= 8) {
> +	if (IS_CHERRYVIEW(dev)) {
> +		int i;
> +		seq_printf(m, "Master Interrupt Control:\t%08x\n",
> +			   I915_READ(GEN8_MASTER_IRQ));
> +
> +		seq_printf(m, "Display IER:\t%08x\n",
> +			   I915_READ(VLV_IER));
> +		seq_printf(m, "Display IIR:\t%08x\n",
> +			   I915_READ(VLV_IIR));
> +		seq_printf(m, "Display IIR_RW:\t%08x\n",
> +			   I915_READ(VLV_IIR_RW));
> +		seq_printf(m, "Display IMR:\t%08x\n",
> +			   I915_READ(VLV_IMR));
> +		for_each_pipe(pipe)
> +			seq_printf(m, "Pipe %c stat:\t%08x\n",
> +				   pipe_name(pipe),
> +				   I915_READ(PIPESTAT(pipe)));
> +
> +		seq_printf(m, "Port hotplug:\t%08x\n",
> +			   I915_READ(PORT_HOTPLUG_EN));
> +		seq_printf(m, "DPFLIPSTAT:\t%08x\n",
> +			   I915_READ(VLV_DPFLIPSTAT));
> +		seq_printf(m, "DPINVGTT:\t%08x\n",
> +			   I915_READ(DPINVGTT));
> +
> +		for (i = 0; i < 4; i++) {
> +			seq_printf(m, "GT Interrupt IMR %d:\t%08x\n",
> +				   i, I915_READ(GEN8_GT_IMR(i)));
> +			seq_printf(m, "GT Interrupt IIR %d:\t%08x\n",
> +				   i, I915_READ(GEN8_GT_IIR(i)));
> +			seq_printf(m, "GT Interrupt IER %d:\t%08x\n",
> +				   i, I915_READ(GEN8_GT_IER(i)));
> +		}
> +
> +		seq_printf(m, "PCU interrupt mask:\t%08x\n",
> +			   I915_READ(GEN8_PCU_IMR));
> +		seq_printf(m, "PCU interrupt identity:\t%08x\n",
> +			   I915_READ(GEN8_PCU_IIR));
> +		seq_printf(m, "PCU interrupt enable:\t%08x\n",
> +			   I915_READ(GEN8_PCU_IER));
> +	} else if (INTEL_INFO(dev)->gen >= 8) {
>  		seq_printf(m, "Master Interrupt Control:\t%08x\n",
>  			   I915_READ(GEN8_MASTER_IRQ));
>  
> -- 
> 1.8.3.2
>
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-- 
Jani Nikula, Intel Open Source Technology Center