[Intel-gfx] [PATCH v5 34.2/71] x86/gpu: Implement stolen memory size early quirk for CHV

ville.syrjala at linux.intel.com ville.syrjala at linux.intel.com
Thu May 8 21:19:41 CEST 2014


From: Damien Lespiau <damien.lespiau at intel.com>

CHV uses the same bits as SNB/VLV to code the Graphics Mode Select field
(GFX stolen memory size) with the addition of finer granularity modes:
4MB increments from 0x11 (8MB) to 0x1d.

Values strictly above 0x1d are either reserved or not supported.

v2: 4MB increments, not 8MB. 32MB has been omitted from the list of new
    values (Ville Syrjälä)

v3: Also correctly interpret GGMS (GTT Graphics Memory Size) (Ville
    Syrjälä)

v4: Don't assign a value that needs 20bits or more to a u16 (Rafael
    Barbalho)

[vsyrjala: v5: Split from i915 changes and add chv_stolen_funcs]

Cc: Ingo Molnar <mingo at kernel.org>
Cc: H. Peter Anvin <hpa at zytor.com>
Reviewed-by: Jani Nikula <jani.nikula at intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Rafael Barbalho <rafael.barbalho at intel.com>
Tested-by: Rafael Barbalho <rafael.barbalho at intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---

Note to x86 folks: This depends on INTEL_CHV_IDS() which is part of some
other i915 patch, so I think it would be easiest to merge this through
Daniel's tree.

 arch/x86/kernel/early-quirks.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 6e2537c..8323575 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -428,6 +428,26 @@ static size_t gen8_stolen_size(int num, int slot, int func)
 	return gmch_ctrl << 25; /* 32 MB units */
 }
 
+static size_t __init chv_stolen_size(int num, int slot, int func)
+{
+	u16 gmch_ctrl;
+
+	gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
+	gmch_ctrl >>= SNB_GMCH_GMS_SHIFT;
+	gmch_ctrl &= SNB_GMCH_GMS_MASK;
+
+	/*
+	 * 0x0  to 0x10: 32MB increments starting at 0MB
+	 * 0x11 to 0x16: 4MB increments starting at 8MB
+	 * 0x17 to 0x1d: 4MB increments start at 36MB
+	 */
+	if (gmch_ctrl < 0x11)
+		return gmch_ctrl << 25;
+	else if (gmch_ctrl < 0x17)
+		return (gmch_ctrl - 0x11 + 2) << 22;
+	else
+		return (gmch_ctrl - 0x17 + 9) << 22;
+}
 
 struct intel_stolen_funcs {
 	size_t (*size)(int num, int slot, int func);
@@ -469,6 +489,11 @@ static const struct intel_stolen_funcs gen8_stolen_funcs = {
 	.size = gen8_stolen_size,
 };
 
+static const struct intel_stolen_funcs chv_stolen_funcs = {
+	.base = intel_stolen_base,
+	.size = chv_stolen_size,
+};
+
 static struct pci_device_id intel_stolen_ids[] __initdata = {
 	INTEL_I830_IDS(&i830_stolen_funcs),
 	INTEL_I845G_IDS(&i845_stolen_funcs),
@@ -495,7 +520,8 @@ static struct pci_device_id intel_stolen_ids[] __initdata = {
 	INTEL_HSW_D_IDS(&gen6_stolen_funcs),
 	INTEL_HSW_M_IDS(&gen6_stolen_funcs),
 	INTEL_BDW_M_IDS(&gen8_stolen_funcs),
-	INTEL_BDW_D_IDS(&gen8_stolen_funcs)
+	INTEL_BDW_D_IDS(&gen8_stolen_funcs),
+	INTEL_CHV_IDS(&chv_stolen_funcs),
 };
 
 static void __init intel_graphics_stolen(int num, int slot, int func)
-- 
1.8.3.2




More information about the Intel-gfx mailing list