[Intel-gfx] [PATCH 18/50] drm/i915/bdw: Macro and module parameter for LRCs (Logical Ring Contexts)

oscar.mateo at intel.com oscar.mateo at intel.com
Fri May 9 14:08:48 CEST 2014


From: Ben Widawsky <benjamin.widawsky at intel.com>

GEN8 brings an expansion of the HW contexts: "Logical Ring Contexts".
These expanded contexts enable a number of new abilities, especially
"Execlists".

In dev_priv, lrc_enabled will reflect the state of whether or not we've
actually properly initialized these new contexts. This helps the
transition in the code but is a candidate for removal at some point.

The macro is defined to off until we have things in place to hope to
work.

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>

v2: Rename "advanced contexts" to the more correct "logical ring
contexts"

Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>

v3: Add a module parameter to enable execlists. Execlist are relatively
new, and so it'd be wise to be able to switch back to ring submission
to debug subtle problems that will inevitably arise.

Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h    | 4 ++++
 drivers/gpu/drm/i915/i915_params.c | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 86730d5..bd93dc2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1506,6 +1506,8 @@ struct drm_i915_private {
 
 	uint32_t hw_context_size;
 	struct list_head context_list;
+	/* Logical Ring Contexts */
+	bool lrc_enabled;
 
 	u32 fdi_rx_config;
 
@@ -1926,6 +1928,7 @@ struct drm_i915_cmd_table {
 #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
 
 #define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 6)
+#define HAS_LOGICAL_RING_CONTEXTS(dev)	0
 #define HAS_ALIASING_PPGTT(dev)	(INTEL_INFO(dev)->gen >= 6 && \
 				 (!IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)))
 #define HAS_PPGTT(dev)		(INTEL_INFO(dev)->gen >= 7 \
@@ -2013,6 +2016,7 @@ struct i915_params {
 	int enable_rc6;
 	int enable_fbc;
 	int enable_ppgtt;
+	int enable_execlists;
 	int enable_psr;
 	unsigned int preliminary_hw_support;
 	int disable_power_well;
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index d05a2af..96eb3ef 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -37,6 +37,7 @@ struct i915_params i915 __read_mostly = {
 	.enable_fbc = -1,
 	.enable_hangcheck = true,
 	.enable_ppgtt = -1,
+	.enable_execlists = -1,
 	.enable_psr = 0,
 	.preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT),
 	.disable_power_well = 1,
@@ -116,6 +117,11 @@ MODULE_PARM_DESC(enable_ppgtt,
 	"Override PPGTT usage. "
 	"(-1=auto [default], 0=disabled, 1=aliasing, 2=full)");
 
+module_param_named(enable_execlists, i915.enable_execlists, int, 0400);
+MODULE_PARM_DESC(enable_execlists,
+	"Override execlists usage. "
+	"(-1=auto, 0=disabled [default], 1=enabled)");
+
 module_param_named(enable_psr, i915.enable_psr, int, 0600);
 MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
 
-- 
1.9.0




More information about the Intel-gfx mailing list