[Intel-gfx] [PATCH v2] drm/i915/chv: Freq(opcode) request for CHV.
deepak.s at linux.intel.com
deepak.s at linux.intel.com
Mon May 12 15:53:03 CEST 2014
From: Deepak S <deepak.s at linux.intel.com>
On CHV, All the freq request should be even. So, we need to make sure we
request the opcode accordingly.
v2: Avoid vairable for freq request (ville)
Signed-off-by: Deepak S <deepak.s at linux.intel.com>
Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
---
drivers/gpu/drm/i915/i915_irq.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 6af51ad..56e93e8 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1161,8 +1161,10 @@ static void gen6_pm_rps_work(struct work_struct *work)
if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) {
if (adj > 0)
adj *= 2;
- else
- adj = 1;
+ else {
+ /* CHV needs even encode values */
+ adj = IS_CHERRYVIEW(dev_priv->dev) ? 2 : 1;
+ }
new_delay = dev_priv->rps.cur_freq + adj;
/*
@@ -1180,8 +1182,10 @@ static void gen6_pm_rps_work(struct work_struct *work)
} else if (pm_iir & GEN6_PM_RP_DOWN_THRESHOLD) {
if (adj < 0)
adj *= 2;
- else
- adj = -1;
+ else {
+ /* CHV needs even encode values */
+ adj = IS_CHERRYVIEW(dev_priv->dev) ? -2 : -1;
+ }
new_delay = dev_priv->rps.cur_freq + adj;
} else { /* unknown event */
new_delay = dev_priv->rps.cur_freq;
--
1.9.1
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