[Intel-gfx] [PATCH v3] drm/i915: Added write-enable pte bit support

[Jesse Barnes]

On Tue, 11 Feb 2014 14:19:03 +0530
akash.goel at intel.com wrote:

> @@ -810,6 +815,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
>  		pt_vaddr[act_pte] =
>  			vm->pte_encode(sg_page_iter_dma_address(&sg_iter),
>  				       cache_level, true);
> +
>  		if (++act_pte == I915_PPGTT_PT_ENTRIES) {
>  			kunmap_atomic(pt_vaddr);
>  			pt_vaddr = NULL;

Some extra whitespace here.

Otherwise:
Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>

Might be good to expose this as a param too, so userspace could use it
for stuff that shouldn't be written...

-- 
Jesse Barnes, Intel Open Source Technology Center