[Intel-gfx] [PATCH 09/10] tests/prime_nv_pcopy: Remove unused tiling tests
Daniel Vetter
daniel.vetter at ffwll.ch
Wed May 14 11:53:42 CEST 2014
We now know that the hardware can't do this, and it's not designed to.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
tests/prime_nv_pcopy.c | 253 -------------------------------------------------
1 file changed, 253 deletions(-)
diff --git a/tests/prime_nv_pcopy.c b/tests/prime_nv_pcopy.c
index 6aa48716348e..fb0f62ff9d86 100644
--- a/tests/prime_nv_pcopy.c
+++ b/tests/prime_nv_pcopy.c
@@ -337,132 +337,12 @@ static void swtile_x(uint8_t *out, const uint8_t *in, int w, int h)
igt_assert(out == endptr);
}
-#if 0
-/* X tiling is approximately linear, except tiled in 512x8 blocks, so lets abuse that
- *
- * How? Whole contiguous tiles can be copied safely as if linear
- */
-
-static int perform_copy_hack(struct nouveau_bo *nvbo, const rect *dst,
- uint32_t dst_x, uint32_t dst_y,
- struct nouveau_bo *nvbi, const rect *src,
- uint32_t src_x, uint32_t src_y,
- uint32_t w, uint32_t h)
-{
- struct nouveau_pushbuf_refn refs[] = {
- { nvbi, (nvbi->flags & NOUVEAU_BO_APER) | NOUVEAU_BO_RD },
- { nvbo, (nvbo->flags & NOUVEAU_BO_APER) | NOUVEAU_BO_WR },
- { query_bo, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR }
- };
- uint32_t exec = 0x00000000;
- uint32_t src_off = 0, dst_off = 0;
- struct nouveau_pushbuf *push = npush;
- uint32_t dw, tiles, tile_src = nvbi->config.nv50.tile_mode, tile_dst = nvbo->config.nv50.tile_mode;
-
- if (tile_src == tile_intel_x)
- dw = 512 - (src_x & 512);
- else
- dw = 512 - (dst_x % 512);
-
- if (!nvbi->config.nv50.memtype)
- exec |= 0x00000010;
- if (!tile_src)
- src_off = src_y * src->pitch + src_x;
-
- if (!nvbo->config.nv50.memtype)
- exec |= 0x00000100;
- if (!tile_dst)
- dst_off = dst_y * dst->pitch + dst_x;
-
- if (dw > w)
- dw = w;
- tiles = 1 + ((w - dw + 511)/512);
-
- if (nouveau_pushbuf_space(push, 8 + tiles * 32, 0, 0) ||
- nouveau_pushbuf_refn(push, refs, 3))
- return -1;
-
- for (; w; w -= dw, src_x += dw, dst_x += dw, dw = w > 512 ? 512 : w) {
- if (tile_src == tile_intel_x) {
- /* Find the correct tiled offset */
- src_off = 8 * dst->pitch * (src_y / 8);
- src_off += src_x / 512 * 4096;
- src_off += (src_x % 512) + 512 * (src_y % 8);
-
- if (!tile_dst)
- dst_off = dst_y * dst->pitch + dst_x;
- } else {
- if (!tile_src)
- src_off = src_y * src->pitch + src_x;
-
- dst_off = 8 * dst->pitch * (dst_y / 8);
- dst_off += dst_x / 512 * 4096;
- dst_off += (dst_x % 512) + 512 * (dst_y % 8);
- }
-
- fprintf(stderr, "Copying from %u to %u for %u bytes\n", src_x, dst_x, dw);
- fprintf(stderr, "src ofs: %u, dst ofs: %u\n", src_off, dst_off);
- BEGIN_NVXX(push, SUBC_COPY(0x0200), 7);
- PUSH_DATA (push, tile_src == tile_intel_x ? 0 : nvbi->config.nv50.tile_mode);
- PUSH_DATA (push, src->pitch);
- PUSH_DATA (push, src->h);
- PUSH_DATA (push, 1);
- PUSH_DATA (push, 0);
- PUSH_DATA (push, src_x);
- PUSH_DATA (push, src_y);
-
- BEGIN_NVXX(push, SUBC_COPY(0x0220), 7);
- PUSH_DATA (push, tile_dst == tile_intel_x ? 0 : nvbo->config.nv50.tile_mode);
- PUSH_DATA (push, dst->pitch);
- PUSH_DATA (push, dst->h);
- PUSH_DATA (push, 1);
- PUSH_DATA (push, 0);
- PUSH_DATA (push, dst_x);
- PUSH_DATA (push, dst_y);
-
- BEGIN_NVXX(push, SUBC_COPY(0x030c), 8);
- PUSH_DATA (push, (nvbi->offset + src_off) >> 32);
- PUSH_DATA (push, (nvbi->offset + src_off));
- PUSH_DATA (push, (nvbo->offset + dst_off) >> 32);
- PUSH_DATA (push, (nvbo->offset + dst_off));
- PUSH_DATA (push, src->pitch);
- PUSH_DATA (push, dst->pitch);
- PUSH_DATA (push, dw);
- PUSH_DATA (push, h);
-
- if (w == dw) {
- exec |= 0x3000; /* QUERY|QUERY_SHORT */
- BEGIN_NVXX(push, SUBC_COPY(0x0338), 3);
- PUSH_DATA (push, (query_bo->offset) >> 32);
- PUSH_DATA (push, (query_bo->offset));
- PUSH_DATA (push, ++query_counter);
- }
-
- BEGIN_NVXX(push, SUBC_COPY(0x0300), 1);
- PUSH_DATA (push, exec);
- }
- nouveau_pushbuf_kick(push, push->channel);
- while (*query < query_counter) { }
- return 0;
-}
-#endif
-
static void perform_copy(struct nouveau_bo *nvbo, const rect *dst,
uint32_t dst_x, uint32_t dst_y,
struct nouveau_bo *nvbi, const rect *src,
uint32_t src_x, uint32_t src_y,
uint32_t w, uint32_t h)
{
-#if 0
- /* Too much effort */
- if (nvbi->config.nv50.tile_mode == tile_intel_x &&
- nvbo->config.nv50.tile_mode == tile_intel_x)
- return -1;
- else if (nvbi->config.nv50.tile_mode == tile_intel_x ||
- nvbo->config.nv50.tile_mode == tile_intel_x)
- return perform_copy_hack(nvbo, dst, dst_x, dst_y,
- nvbi, src, src_x, src_y, w, h);
-#endif
struct nouveau_pushbuf_refn refs[] = {
{ nvbi, (nvbi->flags & NOUVEAU_BO_APER) | NOUVEAU_BO_RD },
{ nvbo, (nvbo->flags & NOUVEAU_BO_APER) | NOUVEAU_BO_WR },
@@ -718,139 +598,6 @@ static void test1_micro(void)
drm_intel_bo_unreference(test_intel_bo);
}
-#if 0 /* nv can't deswizzle into all possible versions of Intel BO objects ... */
-static int check1_swizzle(uint32_t *p, uint32_t pitch, uint32_t lines,
- uint32_t dst_x, uint32_t dst_y, uint32_t w, uint32_t h)
-{
- uint32_t i, val, j;
-
- for (j = 0; j < 32; ++j, p += (pitch - w)/4) {
- for (i = 0; i < 8; ++i, p += 4) {
- val = (i * 32) + j;
- val = (val) | (val << 8) | (val << 16) | (val << 24);
- if (p[0] != val || p[1] != val || p[2] != val || p[3] != val) {
- fprintf(stderr, "Retile check failed in first tile!\n");
- fprintf(stderr, "%08x %08x %08x %08x instead of %08x\n",
- p[0], p[1], p[2], p[3], val);
- return -1;
- }
- }
-
- val = 0x3e3e3e3e;
- for (; i < w/16; ++i, p += 4) {
- if (p[0] != val || p[1] != val || p[2] != val || p[3] != val) {
- fprintf(stderr, "Retile check failed in second tile!\n");
- fprintf(stderr, "%08x %08x %08x %08x instead of %08x\n",
- p[0], p[1], p[2], p[3], val);
- return -1;
- }
- }
- }
-
- for (j = 32; j < h; ++j, p += (pitch - w)/4) {
- val = 0x7e7e7e7e;
- for (i = 0; i < 8; ++i, p += 4) {
- if (p[0] != val || p[1] != val || p[2] != val || p[3] != val) {
- fprintf(stderr, "Retile check failed in third tile!\n");
- fprintf(stderr, "%08x %08x %08x %08x instead of %08x\n",
- p[0], p[1], p[2], p[3], val);
- return -1;
- }
- }
-
- val = 0xcececece;
- for (; i < w/16; ++i, p += 4) {
- if (p[0] != val || p[1] != val || p[2] != val || p[3] != val) {
- fprintf(stderr, "Retile check failed in fourth tile!\n");
- fprintf(stderr, "%08x %08x %08x %08x instead of %08x\n",
- p[0], p[1], p[2], p[3], val);
- return -1;
- }
- }
- }
- return 0;
-}
-
-/* Create a new bo, set tiling to y, and see if macro swizzling is done correctl */
-static int test1_swizzle(void)
-{
- struct nouveau_bo *bo_intel = NULL, *bo_nvidia = NULL, *bo_linear = NULL;
- rect intel, nvidia, linear;
- int ret = -1;
- uint32_t tiling = I915_TILING_Y;
-
- uint32_t src_x = 0, src_y = 0;
- uint32_t dst_x = 0, dst_y = 0;
- uint32_t x, y, w = 256, h = 64;
- uint8_t *ptr;
-
- drm_intel_bo *test_intel_bo;
- int prime_fd;
-
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", w * h, 4096);
- if (!test_intel_bo)
- return -1;
- drm_intel_bo_set_tiling(test_intel_bo, &tiling, w);
- if (tiling != I915_TILING_Y) {
- fprintf(stderr, "Couldn't set y tiling\n");
- goto out;
- }
- ret = drm_intel_gem_bo_map_gtt(test_intel_bo);
- if (ret)
- goto out;
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
- if (prime_fd < 0) {
- drm_intel_bo_unreference(test_intel_bo);
- goto out;
- }
-
- nv_bo_alloc(&bo_intel, &intel, w, h, tile_intel_y, prime_fd, 0);
- nv_bo_alloc(&bo_nvidia, &nvidia, w, h, 0x10, -1, NOUVEAU_BO_VRAM);
- nv_bo_alloc(&bo_linear, &linear, w, h, 0, -1, NOUVEAU_BO_GART);
-
- noop_intel(test_intel_bo);
- ptr = bo_linear->map;
- for (x = 0; x < 128; x += 16)
- for (y = 0; y < 32; ++y)
- fill16(&ptr[y * w + x], x * 2 + y);
-
- /* second tile */
- for (x = 128; x < w; x += 16)
- for (y = 0; y < 32; ++y)
- fill16(&ptr[y * w + x], 0x3e);
-
- /* third tile */
- for (x = 0; x < 128; x += 16)
- for (y = 32; y < h; ++y)
- fill16(&ptr[y * w + x], 0x7e);
-
- /* last tile */
- for (x = 128; x < w; x += 16)
- for (y = 32; y < h; ++y)
- fill16(&ptr[y * w + x], 0xce);
-
- ret = perform_copy(bo_nvidia, &nvidia, 0, 0, bo_linear, &linear, 0, 0, nvidia.pitch, nvidia.h);
- if (ret)
- goto out;
-
- /* Perform the actual sub rectangle copy */
- ret = perform_copy(bo_intel, &intel, dst_x, dst_y, bo_nvidia, &nvidia, src_x, src_y, w, h);
- if (ret)
- goto out;
- noop_intel(test_intel_bo);
-
- ret = check1_swizzle(test_intel_bo->virtual, intel.pitch, intel.h, dst_x, dst_y, w, h);
-
-out:
- nouveau_bo_ref(NULL, &bo_linear);
- nouveau_bo_ref(NULL, &bo_nvidia);
- nouveau_bo_ref(NULL, &bo_intel);
- drm_intel_bo_unreference(test_intel_bo);
- return ret;
-}
-#endif
-
/* test 2, see if we can copy from linear to intel X format safely
* Seems nvidia lacks a method to do it, so just keep this test
* as a reference for potential future tests. Software tiling is
--
1.9.2
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