[Intel-gfx] [PATCH 2/5] drm/i915/bdw: Implement a basic PM interrupt handler

[O'Rourke, Tom]

>+static void gen8_disable_rps_interrupts(struct drm_device *dev) {
>+	struct drm_i915_private *dev_priv = dev->dev_private;
>+
>+	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);

[TOR:] Please note that for Broadwell, bit 31 in GEN6_PMINTRMSK is not an interrupt disable bit.
In "drm/i915: Enable PM Interrupts target via	Display Interface." this bit is defined as:
+#define GEN8_PMINTR_REDIRECT_TO_NON_DISP	(1<<31)

Writing this bit here could have unintended consequences.

Thanks,
Tom

>+	I915_WRITE(GEN8_GT_IER(2), I915_READ(GEN8_GT_IER(2)) &
>+				   ~dev_priv->pm_rps_events);
>+	/* Complete PM interrupt masking here doesn't race with the rps work
>+	 * item again unmasking PM interrupts because that is using a different
>+	 * register (GEN8_GT_IMR(2)) to mask PM interrupts. The only risk is in
>+	 * leaving stale bits in GEN8_GT_IIR(2) and GEN8_GT_IMR(2) which
>+	 * gen8_enable_rps will clean up. */
>+
>+	spin_lock_irq(&dev_priv->irq_lock);
>+	dev_priv->rps.pm_iir = 0;
>+	spin_unlock_irq(&dev_priv->irq_lock);
>+
>+	I915_WRITE(GEN8_GT_IIR(2), dev_priv->pm_rps_events); }
>+