[Intel-gfx] [PULL] drm-intel-next
Daniel Vetter
daniel.vetter at ffwll.ch
Fri May 16 18:43:43 CEST 2014
Hi Dave,
drm-intel-next-2014-05-06:
- ring init improvements (Chris)
- vebox2 support (Zhao Yakui)
- more prep work for runtime pm on Baytrail (Imre)
- eDram support for BDW (Ben)
- prep work for userptr support (Chris)
- first parts of the encoder->mode_set callback removal (Daniel)
- 64b reloc fixes (Ben)
- first part of atomic plane updates (Ville)
Also another ping about topic/core-stuff and for pushing out drm-next with
the properties doc patch applied.
Cheers, Daniel
The following changes since commit 444c9a08bf787e8236e132fab7eceeb2f065aa4c:
Merge branch 'drm-init-cleanup' of git://people.freedesktop.org/~danvet/drm into drm-next (2014-05-01 09:32:21 +1000)
are available in the git repository at:
git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-05-06
for you to fetch changes up to 10efa9321efe5f62637b189587539e4086726a2b:
drm/i915: Remove useless checks from primary enable/disable (2014-05-06 10:18:04 +0200)
----------------------------------------------------------------
- ring init improvements (Chris)
- vebox2 support (Zhao Yakui)
- more prep work for runtime pm on Baytrail (Imre)
- eDram support for BDW (Ben)
- prep work for userptr support (Chris)
- first parts of the encoder->mode_set callback removal (Daniel)
- 64b reloc fixes (Ben)
- first part of atomic plane updates (Ville)
----------------------------------------------------------------
Ben Widawsky (8):
drm/i915/bdw: Add WT caching ability
drm/i915/bdw: enable eDRAM.
drm/i915/bdw: Disable idle DOP clock gating
drm/i915: Move semaphore specific ring members to struct
drm/i915: Virtualize the ringbuffer signal func
drm/i915: Move ring_begin to signal()
drm/i915: Support 64b execbuf
drm/i915: Support 64b relocations
Chris Wilson (10):
drm/i915: Replace hardcoded cacheline size with macro
drm/i915: Preserve ring buffers objects across resume
drm/i915: Allow the module to load even if we fail to setup rings
drm/i915: Mark device as wedged if we fail to resume
drm/i915: Include a little more information about why ring init fails
drm/i915: Validate BDB section before reading
drm/i915: Validate VBT header before trusting it
lib: Export interval_tree
drm/i915: Do not call retire_requests from wait_for_rendering
drm/i915: Avoid NULL ctx->obj dereference in debugfs/i915_context_info
Daniel Vetter (13):
drm/i915: Catch abuse of I915_EXEC_GEN7_SOL_RESET
drm/i915: Catch abuse of I915_EXEC_CONSTANTS_*
drm/i915: Catch dirt in unused execbuffer fields
drm/i915: Integrate cmd parser kerneldoc
drm/i915: Make encoder->mode_set callbacks optional
drm/i915/dvo: Remove ->mode_set callback
drm/i915/tv: extract set_tv_mode_timings
drm/i915/tv: extract set_color_conversion
drm/i915/tv: De-magic device check
drm/i915/tv: Rip out pipe-disabling nonsense from ->mode_set
drm/i915/tv: Remove ->mode_set callback
drm/i915/crt: Remove ->mode_set callback
drm/i915/sdvo: Remove ->mode_set callback
Imre Deak (25):
drm/i915: vlv: clean up GTLC wake control/status register macros
drm/i915: vlv: clear master interrupt flag when disabling interrupts
drm/i915: vlv: add RC6 residency counters
drm/i915: fix the RC6 status debug print
drm/i915: remove the i915_dpio debugfs entry
drm/i915: get a runtime PM ref for debugfs entries where needed
drm/i915: move getting struct_mutex lower in the callstack during GPU reset
drm/i915: get a runtime PM ref for the deferred GT powersave enabling
drm/i915: get a runtime PM ref for the deferred GPU reset work
drm/i915: gen2: move error capture of IER to its correct place
drm/i915: add missing error capturing of the PIPESTAT reg
drm/i915: vlv: check port power domain instead of only D0 for eDP VDD on
drm/i915: fix unbalanced GT powersave enable / disable calls
drm/i915: sanitize enable_rc6 option
drm/i915: disable runtime PM if RC6 is disabled
drm/i915: make runtime PM interrupt enable/disable platform independent
drm/i915: factor out gen6_update_ring_freq
drm/i915: make runtime PM swizzling/ring_freq init platform independent
drm/i915: reinit GT power save during resume
drm/i915: vlv: setup RPS min/max frequencies once during init time
drm/i915: vlv: factor out vlv_force_gfx_clock and check for pending force-off
drm/i915: vlv: increase timeout when forcing on the GFX clock
drm/i915: remove extraneous VGA power domain put calls
drm/i915: bdw: fix RC6 enabled status reporting and disable runtime PM
drm/i915: vlv: init only needed state during early power well enabling
Jan Moskyto Matejka (1):
Revert "drm/i915: fix build warning on 32-bit (v2)"
Jesse Barnes (1):
drm/i915: remove unexplained vblank wait in the DP off code
Ville Syrjälä (11):
drm/i915: Fix deadlock during driver init on ILK
drm/i915: Fix assert_plane warning during FDI link train
drm/i915: Fix scanout position for real
drm/i915: Add intel_get_crtc_scanline()
drm/i915: Make primary_enabled match the actual hardware state
drm/i915: Make sprite updates atomic
drm/i915: Perform primary enable/disable atomically with sprite updates
drm/i915: Add pipe update trace points
drm/i915: Make sure computed watermarks never overflow the registers
drm/i915: Merge LP1+ watermarks in safer way
drm/i915: Remove useless checks from primary enable/disable
Zhao Yakui (6):
drm/i915: Split the BDW device definition to prepare for dual BSD rings on BDW GT3
drm/i915: Update the restrict check to filter out wrong Ring ID passed by user-space
drm/i915:Initialize the second BSD ring on BDW GT3 machine
drm/i915:Handle the irq interrupt for the second BSD ring
drm/i915:Add the VCS2 switch in Intel_ring_setup_status_page
drm/i915: Use the coarse ping-pong mechanism based on drm fd to dispatch the BSD command on BDW GT3
Documentation/DocBook/drm.tmpl | 5 +
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 66 +--
drivers/gpu/drm/i915/i915_dma.c | 12 +-
drivers/gpu/drm/i915/i915_drv.c | 110 +++--
drivers/gpu/drm/i915/i915_drv.h | 19 +-
drivers/gpu/drm/i915/i915_gem.c | 181 ++++----
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 102 ++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 17 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 18 +-
drivers/gpu/drm/i915/i915_irq.c | 173 ++++----
drivers/gpu/drm/i915/i915_reg.h | 14 +-
drivers/gpu/drm/i915/i915_sysfs.c | 4 +
drivers/gpu/drm/i915/i915_trace.h | 75 ++++
drivers/gpu/drm/i915/intel_bios.c | 76 +++-
drivers/gpu/drm/i915/intel_crt.c | 76 ++--
drivers/gpu/drm/i915/intel_display.c | 47 ++-
drivers/gpu/drm/i915/intel_dp.c | 9 +-
drivers/gpu/drm/i915/intel_drv.h | 5 +
drivers/gpu/drm/i915/intel_dvo.c | 4 +-
drivers/gpu/drm/i915/intel_pm.c | 290 ++++++++++---
drivers/gpu/drm/i915/intel_ringbuffer.c | 465 +++++++++++++--------
drivers/gpu/drm/i915/intel_ringbuffer.h | 32 +-
drivers/gpu/drm/i915/intel_sdvo.c | 4 +-
drivers/gpu/drm/i915/intel_sprite.c | 231 ++++++++--
drivers/gpu/drm/i915/intel_tv.c | 214 +++++-----
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
include/drm/i915_pciids.h | 22 +-
lib/Kconfig | 14 +
lib/Kconfig.debug | 1 +
lib/Makefile | 3 +-
lib/interval_tree.c | 6 +
...erval_tree_test_main.c => interval_tree_test.c} | 0
33 files changed, 1516 insertions(+), 785 deletions(-)
rename lib/{interval_tree_test_main.c => interval_tree_test.c} (100%)
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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