[Intel-gfx] [PATCH v2] drm/i915: State readout and cross-checking for dp_m2_n2

[Daniel Vetter]

On Mon, May 19, 2014 at 01:45:37PM +0200, Daniel Vetter wrote:
> On Mon, May 19, 2014 at 05:00:14PM +0530, Vandana Kannan wrote:
> > Please let me know your inputs on this..
> > Given that making changes to avoid DRRS related checks in
> > pipe_config_compare affects the overall design and future
> > implementations related to RR switching, I think that using a quirk for
> > downclock_mode to compare dp_m_n and dp_m2_n2 based on the RR in use,
> > 
> > if (!low RR)
> > 	compare dp_m_n
> > else
> > 	compare dp_m2_n2
> > 
> > would avoid unrelated DRRS checks and make sure extension of DRRS
> > implementation would be possible.
> > Only thing would be that both dp_m_n and dp_m2_n2 cant be compared always..
> 
> Well my idea was for bdw we'd check that
> 
> hw.dp_m_n == sw.dp_m_n || hw.dp_m_n == sw.dp_m2_n2
> 
> without any checks using software state to figure out whether we're in low
> RR mode or not. That way the pipe config checker only depends upon the 2
> pipe configs, which is a nice proper for it to have.

Also we might need to do fbc/psr frobbing after flips and those again
would be easier from process contexts. At least I expect less fuzz if we
can wrap up fbc/psr state in a mutex instead of careful spinlock/irqsave
spinlock trickery.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch