[Intel-gfx] [PATCH] drm/i915/bdw: Only use 2g GGTT for 32b platforms

[Chris Wilson]

On Mon, May 19, 2014 at 03:46:57PM -0700, Rodrigo Vivi wrote:
> From: Ben Widawsky <benjamin.widawsky at intel.com>
> 
> Daniel requested in the bug that I use a 3GB fallback size. Since this
> is not in the spec as a valid size, I decided against it. We could
> potentially add a patch to bump it to 3GB on top of this one.
> 
> This probably should be CC: stable - but I'll let the powers that be
> decide that one.
> 
> Regression from a revert of the revert:
> commit 7907f45bf9f67a1c5e5d4ae05bab428d7c2f43b2
> Author: Ben Widawsky <benjamin.widawsky at intel.com>
> Date:   Wed Feb 19 22:05:46 2014 -0800
> 
>     Revert "drm/i915/bdw: Limit GTT to 2GB"
> 
> v2: Change ifdef to 32b, instead of ifndef
> update comment
> 
> v3. Update comment to not wrap (Daniel).
> Update commit message
> 
> v4: s/CONFIG_32/CONFIG_X86_32 (Jani).
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76619
> Cc: stable at vger.kernel.org
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index afd4eef..050e47e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1773,6 +1773,13 @@ static inline unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)
>  	bdw_gmch_ctl &= BDW_GMCH_GGMS_MASK;
>  	if (bdw_gmch_ctl)
>  		bdw_gmch_ctl = 1 << bdw_gmch_ctl;
> +
> +#ifdef CONFIG_X86_32BIT
> +	/* Limit 32B platforms to a 2GB GGTT: 4 << 20 / pte size * PAGE_SIZE */

We might as well be picky and write 32b not 32B.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre