[Intel-gfx] [PATCH 58/66] drm/i915: Precompute static ddi_pll_sel values in encoders

[Damien Lespiau]

On Thu, Apr 24, 2014 at 11:55:34PM +0200, Daniel Vetter wrote:
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -272,6 +272,7 @@ void intel_ddi_put_crtc_pll(struct drm_crtc *crtc)
>  			I915_WRITE(WRPLL_CTL1, val & ~WRPLL_PLL_ENABLE);
>  			POSTING_READ(WRPLL_CTL1);
>  		}
> +		intel_crtc->config.ddi_pll_sel = PORT_CLK_SEL_NONE;
>  		break;
>  	case PORT_CLK_SEL_WRPLL2:
>  		plls->wrpll2_refcount--;
> @@ -282,13 +283,12 @@ void intel_ddi_put_crtc_pll(struct drm_crtc *crtc)
>  			I915_WRITE(WRPLL_CTL2, val & ~WRPLL_PLL_ENABLE);
>  			POSTING_READ(WRPLL_CTL2);
>  		}
> +		intel_crtc->config.ddi_pll_sel = PORT_CLK_SEL_NONE;
>  		break;
>  	}
>  
>  	WARN(plls->wrpll1_refcount < 0, "Invalid WRPLL1 refcount\n");
>  	WARN(plls->wrpll2_refcount < 0, "Invalid WRPLL2 refcount\n");
> -
> -	intel_crtc->config.ddi_pll_sel = PORT_CLK_SEL_NONE;
>  }

Who sets config.ddi_pll_sel to NONE for VGA and DP now?

-- 
Damien