[Intel-gfx] [PATCH 43/71] drm/i915/chv: Add a bunch of pre production workarounds

[Damien Lespiau]

On Tue, May 20, 2014 at 04:41:13PM +0300, Ville Syrjälä wrote:
> On Tue, May 20, 2014 at 02:22:51PM +0100, Damien Lespiau wrote:
> > On Wed, Apr 09, 2014 at 01:28:41PM +0300, ville.syrjala at linux.intel.com wrote:
> > > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > 
> > > The following workarounds should be needed for pre-production hardware
> > > only:
> > > * WaDisablePwrmtrEvent:chv
> > > * WaSetMaskForGfxBusyness:chv
> > > * WaDisableGunitClockGating:chv
> > > * WaDisableFfDopClockGating:chv
> > > * WaDisableDopClockGating:chv
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > What about that hunk?
> > 
> > > +	I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
> > > +		   GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE);
> > 
> > I couldn't find a W/A in the db nor in BSpec. The rest looks good
> > though.
> 
> It was mentioned in the hsd for the WaDisableDopClockGating w/a. I think
> we already merged the same w/a for bdw but without the tcunit bit even
> though I had questioned the fate of the tcunit bit during review.

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

-- 
Damien