[Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

[Damien Lespiau]

On Wed, May 21, 2014 at 06:35:12PM +0300, Ville Syrjälä wrote:
> > +
> > +/* VLV port control */
> >  #define _MIPIA_PORT_CTRL			(VLV_DISPLAY_BASE + 0x61190)
> >  #define _MIPIB_PORT_CTRL			(VLV_DISPLAY_BASE + 0x61700)
> >  #define MIPI_PORT_CTRL(pipe)		_PIPE(pipe, _MIPIA_PORT_CTRL, _MIPIB_PORT_CTRL)
> 
> Why isn't mipi_mmio_base used here? Does the register not need the new
> offset? I htink it would still be cleaner to use the mipi_mmio_offset
> for all the MIPI registers.

On VLV, this register (a at least one other) isn't part of the MIPI IP
block address space (base + 0xbxxx) so shouldn't be defined as
mipi_mmio_base + offset.

-- 
Damien