[Intel-gfx] [PATCH] drm/i915: Update PSR on resume.

Rodrigo Vivi rodrigo.vivi at gmail.com
Wed May 28 01:50:14 CEST 2014


Some registers set during setup might not be persistent after suspend/resume.
This was causing bugs for some people that was unable to get PSR entry state
after resume cycle.

v2: Adding some comments and better commit message explaining why this is needed.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
---
 drivers/gpu/drm/i915/i915_suspend.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 56785e8..1923708 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -288,6 +288,12 @@ static void i915_restore_display(struct drm_device *dev)
 		I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL);
 	}
 
+	/* Forcing a full init sequence after resume to make sure all
+	* registers are properly set. Some might not be persistent after
+	* suspend/resume cycle. */
+	dev_priv->psr.setup_done = false;
+	intel_edp_psr_update(dev);
+
 	/* only restore FBC info on the platform that supports FBC*/
 	intel_disable_fbc(dev);
 
-- 
1.9.0




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