[Intel-gfx] [PATCH 1/2] drm/i915: use power well count instead of reading hw state when checking status

[Jesse Barnes]

This saves many ms per call on my BYT by eliminating Punit communication
from the hw readout paths.

Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_pm.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 452518f..09a3677 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5572,13 +5572,11 @@ bool intel_display_power_enabled(struct drm_i915_private *dev_priv,
 
 	mutex_lock(&power_domains->lock);
 	for_each_power_well_rev(i, power_well, BIT(domain), power_domains) {
-		if (power_well->always_on)
+		if (power_well->always_on || power_well->count)
 			continue;
 
-		if (!power_well->ops->is_enabled(dev_priv, power_well)) {
-			is_enabled = false;
-			break;
-		}
+		is_enabled = false;
+		break;
 	}
 	mutex_unlock(&power_domains->lock);
 
-- 
1.8.4.2