[Intel-gfx] [PATCH 1/2] drm/i915: Simplify the pfit check in the fastboot hack

[Daniel Vetter]

Checking for lvds/edp is wrong (since we also support dsi panels now)
and not terribly useless. If we want to be more intelligent about all
this then we need to look at the old state to figure out whether the
pfit adjustment is needed. This goes all the way back to the original
fastboot pfit patch:

commit 4d6a3e63bce0cb604864e36585ca8983160a421a
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date:   Wed Jun 26 01:38:18 2013 +0300

    drm/i915: turn off panel fitting at flip time if needed v2

Spotted while reviewing Ander's patch which changed a lot of the
pipe_has_type checks.

Cc: Jesse Barnes <jbarnes at virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter at intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c     | 5 ++---
 drivers/gpu/drm/i915/intel_display.c | 4 +---
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index e620a63a1dfe..d41768846f18 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -473,9 +473,8 @@ intel_ddi_get_crtc_new_encoder(struct intel_crtc *crtc)
 		}
 	}
 
-	if (num_encoders != 1)
-		WARN(1, "%d encoders on crtc for pipe %c\n", num_encoders,
-		     pipe_name(crtc->pipe));
+	WARN(num_encoders != 1, "%d encoders on crtc for pipe %c\n", num_encoders,
+	     pipe_name(crtc->pipe));
 
 	BUG_ON(ret == NULL);
 	return ret;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6bd290d902df..5eb12ed11df5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2877,9 +2877,7 @@ static void intel_update_pipe_size(struct intel_crtc *crtc)
 	I915_WRITE(PIPESRC(crtc->pipe),
 		   ((adjusted_mode->crtc_hdisplay - 1) << 16) |
 		   (adjusted_mode->crtc_vdisplay - 1));
-	if (!crtc->config.pch_pfit.enabled &&
-	    (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
-	     intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) {
+	if (!crtc->config.pch_pfit.enabled) {
 		I915_WRITE(PF_CTL(crtc->pipe), 0);
 		I915_WRITE(PF_WIN_POS(crtc->pipe), 0);
 		I915_WRITE(PF_WIN_SZ(crtc->pipe), 0);
-- 
2.1.1