[Intel-gfx] [PATCH] igt/gem_tiled_wc: Exercise wc mmaps with swizzling
Chris Wilson
chris at chris-wilson.co.uk
Tue Nov 4 08:35:24 CET 2014
This exercises both the wc mmappings and the extended get_tiling ioctl.
Userspace cannot handle bit17 swizzling through wc mmaps (because bit17
requires swizzling based on the actual physical address of the page -
which is unknown to userspace) and so we need an extended get_tiling
ioctl to report the actual as well as the logical swizzling on an
object. We then check that the contents of the object are tiled and
swizzled correctly when viewed through a wc mmap.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
tests/.gitignore | 1 +
tests/Makefile.sources | 1 +
tests/gem_tiled_wc.c | 241 +++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 243 insertions(+)
create mode 100644 tests/gem_tiled_wc.c
diff --git a/tests/.gitignore b/tests/.gitignore
index 6c485f0..7023ede 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -100,6 +100,7 @@ gem_tiled_partial_pwrite_pread
gem_tiled_pread
gem_tiled_pread_pwrite
gem_tiled_swapping
+gem_tiled_wc
gem_tiling_max_stride
gem_unfence_active_buffers
gem_unref_active_buffers
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 6e5458a..d4a203c 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -133,6 +133,7 @@ TESTS_progs = \
gem_tiled_pread \
gem_tiled_pread_pwrite \
gem_tiled_swapping \
+ gem_tiled_wc \
gem_tiling_max_stride \
gem_unfence_active_buffers \
gem_unref_active_buffers \
diff --git a/tests/gem_tiled_wc.c b/tests/gem_tiled_wc.c
new file mode 100644
index 0000000..ad09bc9
--- /dev/null
+++ b/tests/gem_tiled_wc.c
@@ -0,0 +1,241 @@
+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eric Anholt <eric at anholt.net>
+ *
+ */
+
+/** @file gem_tiled_pread.c
+ *
+ * This is a test of pread's behavior on tiled objects with respect to the
+ * reported swizzling value.
+ *
+ * The goal is to exercise the slow_bit17_copy path for reading on bit17
+ * machines, but will also be useful for catching swizzling value bugs on
+ * other systems.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/time.h>
+#include <sys/ioctl.h>
+#include "drm.h"
+#include "ioctl_wrappers.h"
+#include "drmtest.h"
+#include "intel_io.h"
+#include "intel_chipset.h"
+
+#define WIDTH 512
+#define HEIGHT 512
+#define SIZE (WIDTH*HEIGHT*sizeof(uint32_t))
+
+#define PAGE_SIZE 4096
+
+static int tile_width;
+static int tile_height;
+static int tile_size;
+
+static uint32_t
+create_bo(int fd)
+{
+ uint32_t handle;
+ uint32_t *data;
+ int i;
+
+ handle = gem_create(fd, SizE);
+ gem_set_tiling(fd, handle, I915_TILING_X, WIDTH * sizeof(uint32_t));
+
+ /* Fill the BO with dwords starting at start_val */
+ data = gem_mmap__wc(fd, handle, SIZE, PROT_READ | PROT_WRITE);
+ for (i = 0; i < WIDTH*HEIGHT; i++)
+ data[i] = i;
+ munmap(data, SIZE);
+
+ return handle;
+}
+
+static int
+swizzle_bit(int bit, int offset)
+{
+ return (offset & (1 << bit)) >> (bit - 6);
+}
+
+/* Translate from a swizzled offset in the tiled buffer to the corresponding
+ * value from the original linear buffer.
+ */
+static uint32_t
+calculate_expected(int offset)
+{
+ int tile_off = offset & (tile_size - 1);
+ int tile_base = offset & -tile_size;
+ int tile_index = tile_base / tile_size;
+ int tiles_per_row = 4*WIDTH / tile_width;
+
+ /* base x,y values from the tile (page) index. */
+ int base_y = tile_index / tiles_per_row * tile_height;
+ int base_x = tile_index % tiles_per_row * (tile_width/4);
+
+ /* x, y offsets within the tile */
+ int tile_y = tile_off / tile_width;
+ int tile_x = (tile_off % tile_width) / 4;
+
+ igt_debug("%3d, %3d, %3d,%3d\n", base_x, base_y, tile_x, tile_y);
+ return (base_y + tile_y) * WIDTH + base_x + tile_x;
+}
+
+static void
+get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle)
+{
+ struct drm_i915_gem_get_tiling2 {
+ uint32_t handle;
+ uint32_t tiling_mode;
+ uint32_t swizzle_mode;
+ uint32_t phys_swizzle_mode;
+ } arg;
+#define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2)
+
+ memset(&arg, 0, sizeof(arg));
+ arg.handle = handle;
+
+ do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg));
+ igt_requiee(arg.phys_swizzle_mode == arg.swizzle_mode);
+
+ *tiling = arg.tiling_mode;
+ *swizzle = arg.swizzle_mode;
+}
+
+igt_simple_main
+{
+ int fd;
+ int i, iter = 100;
+ uint32_t tiling, swizzle;
+ uint32_t handle;
+
+ fd = drm_open_any();
+
+ igt_require_mmap_wc(fd);
+ get_tiling(fd, handle, &tiling, &swizzle);
+
+ if (IS_GEN2(intel_get_drm_devid(fd))) {
+ tile_height = 16;
+ tile_width = 128;
+ tile_size = 2048;
+ } else {
+ tile_height = 8;
+ tile_width = 512;
+ tile_size = PAGE_SIZE;
+ }
+
+ handle = create_bo(fd);
+
+ /* Read a bunch of random subsets of the data and check that they come
+ * out right.
+ */
+ for (i = 0; i < iter; i++) {
+ int size = WIDTH * HEIGHT * 4;
+ int offset = (random() % size) & ~3;
+ int len = (random() % size) & ~3;
+ int first_page, last_page;
+ uint32_t *linear;
+ int j;
+
+ if (len == 0)
+ len = 4;
+
+ if (offset + len > size)
+ len = size - offset;
+
+ if (i == 0) {
+ offset = 0;
+ len = size;
+ }
+
+ first_page = offset & ~4095;
+ last_page = (offset + len + 4095) & ~4095;
+ offset -= first_page;
+
+ linear = gem_mmap__wc(fd, handle, first_page, last_page - first_page, PROT_READ);
+ igt_assert(linear);
+
+ /* Translate from offsets in the read buffer to the swizzled
+ * address that it corresponds to. This is the opposite of
+ * what Mesa does (calculate offset to be read given the linear
+ * offset it's looking for).
+ */
+ for (j = offset; j < offset + len; j += 4) {
+ uint32_t expected_val, found_val;
+ int swizzled_offset;
+ const char *swizzle_str;
+
+ switch (swizzle) {
+ case I915_BIT_6_SWIZZLE_NONE:
+ swizzled_offset = j;
+ swizzle_str = "none";
+ break;
+ case I915_BIT_6_SWIZZLE_9:
+ swizzled_offset = j ^
+ swizzle_bit(9, j);
+ swizzle_str = "bit9";
+ break;
+ case I915_BIT_6_SWIZZLE_9_10:
+ swizzled_offset = j ^
+ swizzle_bit(9, j) ^
+ swizzle_bit(10, j);
+ swizzle_str = "bit9^10";
+ break;
+ case I915_BIT_6_SWIZZLE_9_11:
+ swizzled_offset = j ^
+ swizzle_bit(9, j) ^
+ swizzle_bit(11, j);
+ swizzle_str = "bit9^11";
+ break;
+ case I915_BIT_6_SWIZZLE_9_10_11:
+ swizzled_offset = j ^
+ swizzle_bit(9, j) ^
+ swizzle_bit(10, j) ^
+ swizzle_bit(11, j);
+ swizzle_str = "bit9^10^11";
+ break;
+ default:
+ igt_assert_f(0, "Bad swizzle bits; %d\n",
+ swizzle);
+ }
+ expected_val = calculate_expected(swizzled_offset);
+ found_val = linear[(j - offset) / 4];
+ igt_assert_f(expected_val == found_val,
+ "Bad read [%d]: %d instead of %d at 0x%08x "
+ "for read from 0x%08x to 0x%08x, swizzle=%s\n",
+ i, found_val, expected_val, j,
+ offset, offset + len,
+ swizzle_str);
+ munmap(linear, last_page - first_page);
+ }
+ }
+
+ close(fd);
+}
--
2.1.1
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