[Intel-gfx] [PATCH 15/28] drm/i915/skl: Check the DDB state at modeset

Daniel Vetter daniel at ffwll.ch
Wed Nov 5 11:33:36 CET 2014


On Tue, Nov 04, 2014 at 05:06:52PM +0000, Damien Lespiau wrote:
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index ecba620..9ec1ab7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10509,6 +10509,56 @@ intel_pipe_config_compare(struct drm_device *dev,
>  	return true;
>  }
>  
> +static void check_wm_state(struct drm_device *dev)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct skl_ddb_allocation hw_ddb, *sw_ddb;
> +	struct intel_crtc *intel_crtc;
> +	int plane;
> +
> +	if (INTEL_INFO(dev)->gen < 9)
> +		return;
> +
> +	skl_ddb_get_hw_state(dev_priv, &hw_ddb);
> +	sw_ddb = &dev_priv->wm.skl_hw.ddb;

This looks like a pretty nifty layering violation, with exposing the skl
function and all. I guess the long-term plan is to have just one wm
structure for everyone, as part of the plane state? And then we'll just
read out the plane state and cross-check that one?
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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