[Intel-gfx] [PATCH 3/3] drm/i915: Cache HPLL frequency on VLV/CHV
Daniel Vetter
daniel at ffwll.ch
Thu Nov 6 15:46:09 CET 2014
On Thu, Nov 06, 2014 at 04:02:10PM +0200, Imre Deak wrote:
> On Tue, 2014-10-07 at 17:41 +0300, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > We need the HPLL frequency when calculating cdclk. Currently we read
> > that out from the hardware every single time, which isn't going to fly
> > very well if the device is runtime suspended. So cache the HPLL
> > frequency in dev_priv and use the cached value.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> You could add:
> Reference: https://bugs.freedesktop.org/show_bug.cgi?id=82939
>
> where this fixes some subtest failures on VLV.
> On 1/3 and 3/3 of this patchset:
> Reviewed-by: Imre Deak <imre.deak at intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
More information about the Intel-gfx
mailing list