[Intel-gfx] [PATCH 3/6] drm/mst: cached EDID for logical ports

Dave Airlie airlied at gmail.com
Mon Nov 10 03:11:43 CET 2014


On 22 October 2014 19:06, Daniel Vetter <daniel at ffwll.ch> wrote:
> On Wed, Oct 22, 2014 at 12:32:04PM +1000, Dave Airlie wrote:
>> From: Dave Airlie <airlied at redhat.com>
>>
>> Logical ports are never going to have EDID changes,
>> they are used for the internal ports on MST monitors.
>>
>> We cache the EDIDs from these to save time at MST probe.
>>
>> Signed-off-by: Dave Airlie <airlied at redhat.com>
>> ---
>>  drivers/gpu/drm/drm_dp_mst_topology.c | 20 ++++++++++++++++++--
>>  drivers/gpu/drm/i915/intel_dp_mst.c   |  2 +-
>>  include/drm/drm_dp_mst_helper.h       |  4 +++-
>>  3 files changed, 22 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
>> index 50926db..ce1113c 100644
>> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
>> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
>> @@ -858,6 +858,8 @@ static void drm_dp_destroy_port(struct kref *kref)
>>       struct drm_dp_mst_topology_mgr *mgr = port->mgr;
>>       if (!port->input) {
>>               port->vcpi.num_slots = 0;
>> +
>> +             kfree(port->cached_edid);
>>               if (port->connector)
>>                       (*port->mgr->cbs->destroy_connector)(mgr, port->connector);
>>               drm_dp_port_teardown_pdt(port, port->pdt);
>> @@ -1096,6 +1098,10 @@ static void drm_dp_add_port(struct drm_dp_mst_branch *mstb,
>>               char proppath[255];
>>               build_mst_prop_path(port, mstb, proppath);
>>               port->connector = (*mstb->mgr->cbs->add_connector)(mstb->mgr, port, proppath);
>> +
>> +             if (port->port_num >= 8) {
>> +                     port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc);
>> +             }
>
> I'm confused about how this works ... the tile property gets added in the
> intel ->add_connector callback already, but that relies upon drm_get_edid
> having parsed the displayid stuff. What am I missing?

The tile property gets added to the connector with no value, but only
gets set with a value here.

Since we rely on the EDID to know the value.

Also previous version of the patch had the call to set the property up
in the wrong patch.

Dave.



More information about the Intel-gfx mailing list