[Intel-gfx] [PATCH v2 6/8] drm/i915: sanitize rps irq enabling

[Imre Deak]

On Mon, 2014-11-10 at 14:15 +0000, Chris Wilson wrote:
> On Mon, Nov 10, 2014 at 04:13:02PM +0200, Imre Deak wrote:
> > On Mon, 2014-11-10 at 13:45 +0000, Chris Wilson wrote:
> > > On Mon, Nov 10, 2014 at 03:41:05PM +0200, Imre Deak wrote:
> > > > Atm we first enable the RPS interrupts then we clear any pending ones.
> > > > By this we could lose an interrupt arriving after we unmasked it. This
> > > > may not be a problem as the caller should handle such a race, but logic
> > > > still calls for the opposite order. Also we can delay enabling the
> > > > interrupts until after all the RPS initialization is ready with the
> > > > following order:
> > > > 
> > > 
> > > 0. disable left-over RPS
> > 
> > Isn't enough relying on
> > intel_uncore_sanitize()->intel_disable_gt_powersave()?
> 
> That should be enough. It's an important step to remember though :)

Ok. Btw, I also thought of clearing the interrupts right before enabling
them which would've made things simpler. I wasn't sure though if we
could lose some interrupt that the init step would trigger; though that
may not be an issue. In any case this looked like the more robust order.

> > > > 1. clear any pending RPS interrupts
> > > > 2. initialize RPS
> > > > 3. enable RPS interrupts
> -Chris
>