[Intel-gfx] [PATCH 2/7] drm/i915: Allow intel_plane_disable() to operate on all plane types

Bob Paauwe bob.j.paauwe at intel.com
Thu Nov 13 20:11:38 CET 2014


On Thu, 13 Nov 2014 10:43:21 -0800
Matt Roper <matthew.d.roper at intel.com> wrote:

> We'll want to call this from the type-agnostic atomic plane helper
> hooks.  Since it's not sprite-specific anymore, more it to
> intel_display.c as well.
> 
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h     |  3 ++-
>  drivers/gpu/drm/i915/intel_sprite.c  | 10 +---------
>  3 files changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a9f90b8..c6598e9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13679,3 +13679,24 @@ void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file)
>  		spin_unlock_irq(&dev->event_lock);
>  	}
>  }
> +
> +void intel_plane_disable(struct drm_plane *plane)
> +{
> +	if (!plane->crtc || !plane->fb)
> +		return;
> +
> +	switch (plane->type) {
> +	case DRM_PLANE_TYPE_PRIMARY:
> +		intel_primary_plane_disable(plane);
> +		break;
> +	case DRM_PLANE_TYPE_CURSOR:
> +		intel_cursor_plane_disable(plane);
> +		break;
> +	case DRM_PLANE_TYPE_OVERLAY:
> +		intel_disable_plane(plane);
> +		break;
> +	default:
> +		WARN(1, "Unknown plane type");
> +	}
> +}
> +
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index bd5ef4e..df1420b 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -920,6 +920,7 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane);
>  void intel_finish_page_flip(struct drm_device *dev, int pipe);
>  void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
>  void intel_check_page_flip(struct drm_device *dev, int pipe);
> +void intel_plane_disable(struct drm_plane *plane);
>  
>  /* shared dpll functions */
>  struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
> @@ -1180,7 +1181,6 @@ int intel_plane_set_property(struct drm_plane *plane,
>  			     struct drm_property *prop,
>  			     uint64_t val);
>  int intel_plane_restore(struct drm_plane *plane);
> -void intel_plane_disable(struct drm_plane *plane);
>  int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
>  			      struct drm_file *file_priv);
>  int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
> @@ -1188,6 +1188,7 @@ int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
>  bool intel_pipe_update_start(struct intel_crtc *crtc,
>  			     uint32_t *start_vbl_count);
>  void intel_pipe_update_end(struct intel_crtc *crtc, u32 start_vbl_count);
> +int intel_disable_plane(struct drm_plane *plane);

Would it make sense to rename this to intel_sprite_plane_disable() as
part of this?  It would be more consistent with the cursor and primary
plane naming conventions and likely avoid some confusion with the
intel_plane_disable() function.
 
>  
>  /* intel_tv.c */
>  void intel_tv_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index fc96d13..115acd3 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1425,7 +1425,7 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
>  	return 0;
>  }
>  
> -static int
> +int
>  intel_disable_plane(struct drm_plane *plane)
>  {
>  	struct drm_device *dev = plane->dev;
> @@ -1576,14 +1576,6 @@ int intel_plane_restore(struct drm_plane *plane)
>  				  intel_plane->src_w, intel_plane->src_h);
>  }
>  
> -void intel_plane_disable(struct drm_plane *plane)
> -{
> -	if (!plane->crtc || !plane->fb)
> -		return;
> -
> -	intel_disable_plane(plane);
> -}
> -
>  static const struct drm_plane_funcs intel_plane_funcs = {
>  	.update_plane = intel_update_plane,
>  	.disable_plane = intel_disable_plane,




More information about the Intel-gfx mailing list